Simulate and disasm NOP on ARM

src/arm/constants-arm.h

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 673 matching lines @@
   // Test for special encodings of type 0 instructions (extra loads and stores,
   // as well as multiplications).
   inline bool IsSpecialType0() const { return (Bit(7) == 1) && (Bit(4) == 1); }
 
   // Test for miscellaneous instructions encodings of type 0 instructions.
   inline bool IsMiscType0() const { return (Bit(24) == 1)
                                            && (Bit(23) == 0)
                                            && (Bit(20) == 0)
                                            && ((Bit(7) == 0)); }
 
+  // Test for a nop instruction, which falls under type 1.
+  inline bool IsNopType1() const { return Bits(24, 0) == 0x0120F000; }
+
   // Test for a stop instruction.
   inline bool IsStop() const {
     return (TypeValue() == 7) && (Bit(24) == 1) && (SvcValue() >= kStopCode);
   }
 
   // Special accessors that test for existence of a value.
   inline bool HasS()    const { return SValue() == 1; }
   inline bool HasB()    const { return BValue() == 1; }
   inline bool HasW()    const { return WValue() == 1; }
   inline bool HasL()    const { return LValue() == 1; }
@@ skipping 62 matching lines @@
   static int Number(const char* name, bool* is_double);
 
  private:
   static const char* names_[kNumVFPRegisters];
 };
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM_CONSTANTS_ARM_H_