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Issue 11087047: Allow unaligned accesses for ARMv7. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Address comments Created 8 years, 2 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1059 // Some ARM platforms raise an interrupt on detecting unaligned access. 1059 // Some ARM platforms raise an interrupt on detecting unaligned access.
1060 // On others it does a funky rotation thing. For now we 1060 // On others it does a funky rotation thing. For now we
1061 // simply disallow unaligned reads. Note that simulator runs have the runtime 1061 // simply disallow unaligned reads. Note that simulator runs have the runtime
1062 // system running directly on the host system and only generated code is 1062 // system running directly on the host system and only generated code is
1063 // executed in the simulator. Since the host is typically IA32 we will not 1063 // executed in the simulator. Since the host is typically IA32 we will not
1064 // get the correct ARM-like behaviour on unaligned accesses for those ARM 1064 // get the correct ARM-like behaviour on unaligned accesses for those ARM
1065 // targets that don't support unaligned loads and stores. 1065 // targets that don't support unaligned loads and stores.
1066 1066
1067 1067
1068 int Simulator::ReadW(int32_t addr, Instruction* instr) { 1068 int Simulator::ReadW(int32_t addr, Instruction* instr) {
1069 #if V8_TARGET_CAN_READ_UNALIGNED 1069 if (FLAG_enable_unaligned_accesses || (addr & 3) == 0) {
1070 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
1071 return *ptr;
1072 #else
1073 if ((addr & 3) == 0) {
1074 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); 1070 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
1075 return *ptr; 1071 return *ptr;
1072 } else {
1073 PrintF("Unaligned read at 0x%08x, pc=0x%08" V8PRIxPTR "\n",
1074 addr,
1075 reinterpret_cast<intptr_t>(instr));
1076 UNIMPLEMENTED();
1077 return 0;
1076 } 1078 }
1077 PrintF("Unaligned read at 0x%08x, pc=0x%08" V8PRIxPTR "\n",
1078 addr,
1079 reinterpret_cast<intptr_t>(instr));
1080 UNIMPLEMENTED();
1081 return 0;
1082 #endif
1083 } 1079 }
1084 1080
1085 1081
1086 void Simulator::WriteW(int32_t addr, int value, Instruction* instr) { 1082 void Simulator::WriteW(int32_t addr, int value, Instruction* instr) {
1087 #if V8_TARGET_CAN_READ_UNALIGNED 1083 if (FLAG_enable_unaligned_accesses || (addr & 3) == 0) {
1088 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
1089 *ptr = value;
1090 return;
1091 #else
1092 if ((addr & 3) == 0) {
1093 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); 1084 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
1094 *ptr = value; 1085 *ptr = value;
1095 return; 1086 } else {
1087 PrintF("Unaligned write at 0x%08x, pc=0x%08" V8PRIxPTR "\n",
1088 addr,
1089 reinterpret_cast<intptr_t>(instr));
1090 UNIMPLEMENTED();
1096 } 1091 }
1097 PrintF("Unaligned write at 0x%08x, pc=0x%08" V8PRIxPTR "\n",
1098 addr,
1099 reinterpret_cast<intptr_t>(instr));
1100 UNIMPLEMENTED();
1101 #endif
1102 } 1092 }
1103 1093
1104 1094
1105 uint16_t Simulator::ReadHU(int32_t addr, Instruction* instr) { 1095 uint16_t Simulator::ReadHU(int32_t addr, Instruction* instr) {
1106 #if V8_TARGET_CAN_READ_UNALIGNED 1096 if (FLAG_enable_unaligned_accesses || (addr & 1) == 0) {
1107 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
1108 return *ptr;
1109 #else
1110 if ((addr & 1) == 0) {
1111 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr); 1097 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
1112 return *ptr; 1098 return *ptr;
1099 } else {
1100 PrintF("Unaligned unsigned halfword read at 0x%08x, pc=0x%08"
1101 V8PRIxPTR "\n",
1102 addr,
1103 reinterpret_cast<intptr_t>(instr));
1104 UNIMPLEMENTED();
1105 return 0;
1113 } 1106 }
1114 PrintF("Unaligned unsigned halfword read at 0x%08x, pc=0x%08" V8PRIxPTR "\n",
1115 addr,
1116 reinterpret_cast<intptr_t>(instr));
1117 UNIMPLEMENTED();
1118 return 0;
1119 #endif
1120 } 1107 }
1121 1108
1122 1109
1123 int16_t Simulator::ReadH(int32_t addr, Instruction* instr) { 1110 int16_t Simulator::ReadH(int32_t addr, Instruction* instr) {
1124 #if V8_TARGET_CAN_READ_UNALIGNED 1111 if (FLAG_enable_unaligned_accesses || (addr & 1) == 0) {
1125 int16_t* ptr = reinterpret_cast<int16_t*>(addr);
1126 return *ptr;
1127 #else
1128 if ((addr & 1) == 0) {
1129 int16_t* ptr = reinterpret_cast<int16_t*>(addr); 1112 int16_t* ptr = reinterpret_cast<int16_t*>(addr);
1130 return *ptr; 1113 return *ptr;
1114 } else {
1115 PrintF("Unaligned signed halfword read at 0x%08x\n", addr);
1116 UNIMPLEMENTED();
1117 return 0;
1131 } 1118 }
1132 PrintF("Unaligned signed halfword read at 0x%08x\n", addr);
1133 UNIMPLEMENTED();
1134 return 0;
1135 #endif
1136 } 1119 }
1137 1120
1138 1121
1139 void Simulator::WriteH(int32_t addr, uint16_t value, Instruction* instr) { 1122 void Simulator::WriteH(int32_t addr, uint16_t value, Instruction* instr) {
1140 #if V8_TARGET_CAN_READ_UNALIGNED 1123 if (FLAG_enable_unaligned_accesses || (addr & 1) == 0) {
1141 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
1142 *ptr = value;
1143 return;
1144 #else
1145 if ((addr & 1) == 0) {
1146 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr); 1124 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
1147 *ptr = value; 1125 *ptr = value;
1148 return; 1126 } else {
1127 PrintF("Unaligned unsigned halfword write at 0x%08x, pc=0x%08"
1128 V8PRIxPTR "\n",
1129 addr,
1130 reinterpret_cast<intptr_t>(instr));
1131 UNIMPLEMENTED();
1149 } 1132 }
1150 PrintF("Unaligned unsigned halfword write at 0x%08x, pc=0x%08" V8PRIxPTR "\n",
1151 addr,
1152 reinterpret_cast<intptr_t>(instr));
1153 UNIMPLEMENTED();
1154 #endif
1155 } 1133 }
1156 1134
1157 1135
1158 void Simulator::WriteH(int32_t addr, int16_t value, Instruction* instr) { 1136 void Simulator::WriteH(int32_t addr, int16_t value, Instruction* instr) {
1159 #if V8_TARGET_CAN_READ_UNALIGNED 1137 if (FLAG_enable_unaligned_accesses || (addr & 1) == 0) {
1160 int16_t* ptr = reinterpret_cast<int16_t*>(addr);
1161 *ptr = value;
1162 return;
1163 #else
1164 if ((addr & 1) == 0) {
1165 int16_t* ptr = reinterpret_cast<int16_t*>(addr); 1138 int16_t* ptr = reinterpret_cast<int16_t*>(addr);
1166 *ptr = value; 1139 *ptr = value;
1167 return; 1140 } else {
1141 PrintF("Unaligned halfword write at 0x%08x, pc=0x%08" V8PRIxPTR "\n",
1142 addr,
1143 reinterpret_cast<intptr_t>(instr));
1144 UNIMPLEMENTED();
1168 } 1145 }
1169 PrintF("Unaligned halfword write at 0x%08x, pc=0x%08" V8PRIxPTR "\n",
1170 addr,
1171 reinterpret_cast<intptr_t>(instr));
1172 UNIMPLEMENTED();
1173 #endif
1174 } 1146 }
1175 1147
1176 1148
1177 uint8_t Simulator::ReadBU(int32_t addr) { 1149 uint8_t Simulator::ReadBU(int32_t addr) {
1178 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr); 1150 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr);
1179 return *ptr; 1151 return *ptr;
1180 } 1152 }
1181 1153
1182 1154
1183 int8_t Simulator::ReadB(int32_t addr) { 1155 int8_t Simulator::ReadB(int32_t addr) {
1184 int8_t* ptr = reinterpret_cast<int8_t*>(addr); 1156 int8_t* ptr = reinterpret_cast<int8_t*>(addr);
1185 return *ptr; 1157 return *ptr;
1186 } 1158 }
1187 1159
1188 1160
1189 void Simulator::WriteB(int32_t addr, uint8_t value) { 1161 void Simulator::WriteB(int32_t addr, uint8_t value) {
1190 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr); 1162 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr);
1191 *ptr = value; 1163 *ptr = value;
1192 } 1164 }
1193 1165
1194 1166
1195 void Simulator::WriteB(int32_t addr, int8_t value) { 1167 void Simulator::WriteB(int32_t addr, int8_t value) {
1196 int8_t* ptr = reinterpret_cast<int8_t*>(addr); 1168 int8_t* ptr = reinterpret_cast<int8_t*>(addr);
1197 *ptr = value; 1169 *ptr = value;
1198 } 1170 }
1199 1171
1200 1172
1201 int32_t* Simulator::ReadDW(int32_t addr) { 1173 int32_t* Simulator::ReadDW(int32_t addr) {
1202 #if V8_TARGET_CAN_READ_UNALIGNED 1174 if (FLAG_enable_unaligned_accesses || (addr & 3) == 0) {
1203 int32_t* ptr = reinterpret_cast<int32_t*>(addr);
1204 return ptr;
1205 #else
1206 if ((addr & 3) == 0) {
1207 int32_t* ptr = reinterpret_cast<int32_t*>(addr); 1175 int32_t* ptr = reinterpret_cast<int32_t*>(addr);
1208 return ptr; 1176 return ptr;
1177 } else {
1178 PrintF("Unaligned read at 0x%08x\n", addr);
1179 UNIMPLEMENTED();
1180 return 0;
1209 } 1181 }
1210 PrintF("Unaligned read at 0x%08x\n", addr);
1211 UNIMPLEMENTED();
1212 return 0;
1213 #endif
1214 } 1182 }
1215 1183
1216 1184
1217 void Simulator::WriteDW(int32_t addr, int32_t value1, int32_t value2) { 1185 void Simulator::WriteDW(int32_t addr, int32_t value1, int32_t value2) {
1218 #if V8_TARGET_CAN_READ_UNALIGNED 1186 if (FLAG_enable_unaligned_accesses || (addr & 3) == 0) {
1219 int32_t* ptr = reinterpret_cast<int32_t*>(addr);
1220 *ptr++ = value1;
1221 *ptr = value2;
1222 return;
1223 #else
1224 if ((addr & 3) == 0) {
1225 int32_t* ptr = reinterpret_cast<int32_t*>(addr); 1187 int32_t* ptr = reinterpret_cast<int32_t*>(addr);
1226 *ptr++ = value1; 1188 *ptr++ = value1;
1227 *ptr = value2; 1189 *ptr = value2;
1228 return; 1190 } else {
1191 PrintF("Unaligned write at 0x%08x\n", addr);
1192 UNIMPLEMENTED();
1229 } 1193 }
1230 PrintF("Unaligned write at 0x%08x\n", addr);
1231 UNIMPLEMENTED();
1232 #endif
1233 } 1194 }
1234 1195
1235 1196
1236 // Returns the limit of the stack area to enable checking for stack overflows. 1197 // Returns the limit of the stack area to enable checking for stack overflows.
1237 uintptr_t Simulator::StackLimit() const { 1198 uintptr_t Simulator::StackLimit() const {
1238 // Leave a safety margin of 1024 bytes to prevent overrunning the stack when 1199 // Leave a safety margin of 1024 bytes to prevent overrunning the stack when
1239 // pushing values. 1200 // pushing values.
1240 return reinterpret_cast<uintptr_t>(stack_) + 1024; 1201 return reinterpret_cast<uintptr_t>(stack_) + 1024;
1241 } 1202 }
1242 1203
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3415 uintptr_t address = *stack_slot; 3376 uintptr_t address = *stack_slot;
3416 set_register(sp, current_sp + sizeof(uintptr_t)); 3377 set_register(sp, current_sp + sizeof(uintptr_t));
3417 return address; 3378 return address;
3418 } 3379 }
3419 3380
3420 } } // namespace v8::internal 3381 } } // namespace v8::internal
3421 3382
3422 #endif // USE_SIMULATOR 3383 #endif // USE_SIMULATOR
3423 3384
3424 #endif // V8_TARGET_ARCH_ARM 3385 #endif // V8_TARGET_ARCH_ARM
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