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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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1059 // Some ARM platforms raise an interrupt on detecting unaligned access. | 1059 // Some ARM platforms raise an interrupt on detecting unaligned access. |
1060 // On others it does a funky rotation thing. For now we | 1060 // On others it does a funky rotation thing. For now we |
1061 // simply disallow unaligned reads. Note that simulator runs have the runtime | 1061 // simply disallow unaligned reads. Note that simulator runs have the runtime |
1062 // system running directly on the host system and only generated code is | 1062 // system running directly on the host system and only generated code is |
1063 // executed in the simulator. Since the host is typically IA32 we will not | 1063 // executed in the simulator. Since the host is typically IA32 we will not |
1064 // get the correct ARM-like behaviour on unaligned accesses for those ARM | 1064 // get the correct ARM-like behaviour on unaligned accesses for those ARM |
1065 // targets that don't support unaligned loads and stores. | 1065 // targets that don't support unaligned loads and stores. |
1066 | 1066 |
1067 | 1067 |
1068 int Simulator::ReadW(int32_t addr, Instruction* instr) { | 1068 int Simulator::ReadW(int32_t addr, Instruction* instr) { |
1069 #if V8_TARGET_CAN_READ_UNALIGNED | 1069 if (FLAG_enable_unaligned_accesses) { |
1070 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); | |
1071 return *ptr; | |
1072 #else | |
1073 if ((addr & 3) == 0) { | |
1074 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); | 1070 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); |
1075 return *ptr; | 1071 return *ptr; |
1072 } else if ((addr & 3) == 0) { | |
JF
2012/10/10 10:35:08
Why not fold this into the previous block?
if (FL
ulan
2012/10/10 12:13:28
Done, thanks.
| |
1073 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); | |
1074 return *ptr; | |
1075 } else { | |
1076 PrintF("Unaligned read at 0x%08x, pc=0x%08" V8PRIxPTR "\n", | |
1077 addr, | |
1078 reinterpret_cast<intptr_t>(instr)); | |
1079 UNIMPLEMENTED(); | |
1080 return 0; | |
1076 } | 1081 } |
1077 PrintF("Unaligned read at 0x%08x, pc=0x%08" V8PRIxPTR "\n", | |
1078 addr, | |
1079 reinterpret_cast<intptr_t>(instr)); | |
1080 UNIMPLEMENTED(); | |
1081 return 0; | |
1082 #endif | |
1083 } | 1082 } |
1084 | 1083 |
1085 | 1084 |
1086 void Simulator::WriteW(int32_t addr, int value, Instruction* instr) { | 1085 void Simulator::WriteW(int32_t addr, int value, Instruction* instr) { |
1087 #if V8_TARGET_CAN_READ_UNALIGNED | 1086 if (FLAG_enable_unaligned_accesses) { |
1088 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); | |
1089 *ptr = value; | |
1090 return; | |
1091 #else | |
1092 if ((addr & 3) == 0) { | |
1093 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); | 1087 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); |
1094 *ptr = value; | 1088 *ptr = value; |
1095 return; | 1089 } else if ((addr & 3) == 0) { |
1090 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr); | |
1091 *ptr = value; | |
1092 } else { | |
1093 PrintF("Unaligned write at 0x%08x, pc=0x%08" V8PRIxPTR "\n", | |
1094 addr, | |
1095 reinterpret_cast<intptr_t>(instr)); | |
1096 UNIMPLEMENTED(); | |
1096 } | 1097 } |
1097 PrintF("Unaligned write at 0x%08x, pc=0x%08" V8PRIxPTR "\n", | |
1098 addr, | |
1099 reinterpret_cast<intptr_t>(instr)); | |
1100 UNIMPLEMENTED(); | |
1101 #endif | |
1102 } | 1098 } |
1103 | 1099 |
1104 | 1100 |
1105 uint16_t Simulator::ReadHU(int32_t addr, Instruction* instr) { | 1101 uint16_t Simulator::ReadHU(int32_t addr, Instruction* instr) { |
1106 #if V8_TARGET_CAN_READ_UNALIGNED | 1102 if (FLAG_enable_unaligned_accesses) { |
1107 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr); | |
1108 return *ptr; | |
1109 #else | |
1110 if ((addr & 1) == 0) { | |
1111 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr); | 1103 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr); |
1112 return *ptr; | 1104 return *ptr; |
1105 } else if ((addr & 1) == 0) { | |
1106 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr); | |
1107 return *ptr; | |
1108 } else { | |
1109 PrintF("Unaligned unsigned halfword read at 0x%08x, pc=0x%08" | |
1110 V8PRIxPTR "\n", | |
1111 addr, | |
1112 reinterpret_cast<intptr_t>(instr)); | |
1113 UNIMPLEMENTED(); | |
1114 return 0; | |
1113 } | 1115 } |
1114 PrintF("Unaligned unsigned halfword read at 0x%08x, pc=0x%08" V8PRIxPTR "\n", | |
1115 addr, | |
1116 reinterpret_cast<intptr_t>(instr)); | |
1117 UNIMPLEMENTED(); | |
1118 return 0; | |
1119 #endif | |
1120 } | 1116 } |
1121 | 1117 |
1122 | 1118 |
1123 int16_t Simulator::ReadH(int32_t addr, Instruction* instr) { | 1119 int16_t Simulator::ReadH(int32_t addr, Instruction* instr) { |
1124 #if V8_TARGET_CAN_READ_UNALIGNED | 1120 if (FLAG_enable_unaligned_accesses) { |
1125 int16_t* ptr = reinterpret_cast<int16_t*>(addr); | |
1126 return *ptr; | |
1127 #else | |
1128 if ((addr & 1) == 0) { | |
1129 int16_t* ptr = reinterpret_cast<int16_t*>(addr); | 1121 int16_t* ptr = reinterpret_cast<int16_t*>(addr); |
1130 return *ptr; | 1122 return *ptr; |
1123 } else if ((addr & 1) == 0) { | |
1124 int16_t* ptr = reinterpret_cast<int16_t*>(addr); | |
1125 return *ptr; | |
1126 } else { | |
1127 PrintF("Unaligned signed halfword read at 0x%08x\n", addr); | |
1128 UNIMPLEMENTED(); | |
1129 return 0; | |
1131 } | 1130 } |
1132 PrintF("Unaligned signed halfword read at 0x%08x\n", addr); | |
1133 UNIMPLEMENTED(); | |
1134 return 0; | |
1135 #endif | |
1136 } | 1131 } |
1137 | 1132 |
1138 | 1133 |
1139 void Simulator::WriteH(int32_t addr, uint16_t value, Instruction* instr) { | 1134 void Simulator::WriteH(int32_t addr, uint16_t value, Instruction* instr) { |
1140 #if V8_TARGET_CAN_READ_UNALIGNED | 1135 if (FLAG_enable_unaligned_accesses) { |
1141 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr); | |
1142 *ptr = value; | |
1143 return; | |
1144 #else | |
1145 if ((addr & 1) == 0) { | |
1146 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr); | 1136 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr); |
1147 *ptr = value; | 1137 *ptr = value; |
1148 return; | 1138 } else if ((addr & 1) == 0) { |
1139 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr); | |
1140 *ptr = value; | |
1141 } else { | |
1142 PrintF("Unaligned unsigned halfword write at 0x%08x, pc=0x%08" | |
1143 V8PRIxPTR "\n", | |
1144 addr, | |
1145 reinterpret_cast<intptr_t>(instr)); | |
1146 UNIMPLEMENTED(); | |
1149 } | 1147 } |
1150 PrintF("Unaligned unsigned halfword write at 0x%08x, pc=0x%08" V8PRIxPTR "\n", | |
1151 addr, | |
1152 reinterpret_cast<intptr_t>(instr)); | |
1153 UNIMPLEMENTED(); | |
1154 #endif | |
1155 } | 1148 } |
1156 | 1149 |
1157 | 1150 |
1158 void Simulator::WriteH(int32_t addr, int16_t value, Instruction* instr) { | 1151 void Simulator::WriteH(int32_t addr, int16_t value, Instruction* instr) { |
1159 #if V8_TARGET_CAN_READ_UNALIGNED | 1152 if (FLAG_enable_unaligned_accesses) { |
1160 int16_t* ptr = reinterpret_cast<int16_t*>(addr); | |
1161 *ptr = value; | |
1162 return; | |
1163 #else | |
1164 if ((addr & 1) == 0) { | |
1165 int16_t* ptr = reinterpret_cast<int16_t*>(addr); | 1153 int16_t* ptr = reinterpret_cast<int16_t*>(addr); |
1166 *ptr = value; | 1154 *ptr = value; |
1167 return; | 1155 } else if ((addr & 1) == 0) { |
1156 int16_t* ptr = reinterpret_cast<int16_t*>(addr); | |
1157 *ptr = value; | |
1158 } else { | |
1159 PrintF("Unaligned halfword write at 0x%08x, pc=0x%08" V8PRIxPTR "\n", | |
1160 addr, | |
1161 reinterpret_cast<intptr_t>(instr)); | |
1162 UNIMPLEMENTED(); | |
1168 } | 1163 } |
1169 PrintF("Unaligned halfword write at 0x%08x, pc=0x%08" V8PRIxPTR "\n", | |
1170 addr, | |
1171 reinterpret_cast<intptr_t>(instr)); | |
1172 UNIMPLEMENTED(); | |
1173 #endif | |
1174 } | 1164 } |
1175 | 1165 |
1176 | 1166 |
1177 uint8_t Simulator::ReadBU(int32_t addr) { | 1167 uint8_t Simulator::ReadBU(int32_t addr) { |
1178 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr); | 1168 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr); |
1179 return *ptr; | 1169 return *ptr; |
1180 } | 1170 } |
1181 | 1171 |
1182 | 1172 |
1183 int8_t Simulator::ReadB(int32_t addr) { | 1173 int8_t Simulator::ReadB(int32_t addr) { |
1184 int8_t* ptr = reinterpret_cast<int8_t*>(addr); | 1174 int8_t* ptr = reinterpret_cast<int8_t*>(addr); |
1185 return *ptr; | 1175 return *ptr; |
1186 } | 1176 } |
1187 | 1177 |
1188 | 1178 |
1189 void Simulator::WriteB(int32_t addr, uint8_t value) { | 1179 void Simulator::WriteB(int32_t addr, uint8_t value) { |
1190 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr); | 1180 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr); |
1191 *ptr = value; | 1181 *ptr = value; |
1192 } | 1182 } |
1193 | 1183 |
1194 | 1184 |
1195 void Simulator::WriteB(int32_t addr, int8_t value) { | 1185 void Simulator::WriteB(int32_t addr, int8_t value) { |
1196 int8_t* ptr = reinterpret_cast<int8_t*>(addr); | 1186 int8_t* ptr = reinterpret_cast<int8_t*>(addr); |
1197 *ptr = value; | 1187 *ptr = value; |
1198 } | 1188 } |
1199 | 1189 |
1200 | 1190 |
1201 int32_t* Simulator::ReadDW(int32_t addr) { | 1191 int32_t* Simulator::ReadDW(int32_t addr) { |
1202 #if V8_TARGET_CAN_READ_UNALIGNED | 1192 if (FLAG_enable_unaligned_accesses) { |
1203 int32_t* ptr = reinterpret_cast<int32_t*>(addr); | |
1204 return ptr; | |
1205 #else | |
1206 if ((addr & 3) == 0) { | |
1207 int32_t* ptr = reinterpret_cast<int32_t*>(addr); | 1193 int32_t* ptr = reinterpret_cast<int32_t*>(addr); |
1208 return ptr; | 1194 return ptr; |
1195 } else if ((addr & 3) == 0) { | |
1196 int32_t* ptr = reinterpret_cast<int32_t*>(addr); | |
1197 return ptr; | |
1198 } else { | |
1199 PrintF("Unaligned read at 0x%08x\n", addr); | |
1200 UNIMPLEMENTED(); | |
1201 return 0; | |
1209 } | 1202 } |
1210 PrintF("Unaligned read at 0x%08x\n", addr); | |
1211 UNIMPLEMENTED(); | |
1212 return 0; | |
1213 #endif | |
1214 } | 1203 } |
1215 | 1204 |
1216 | 1205 |
1217 void Simulator::WriteDW(int32_t addr, int32_t value1, int32_t value2) { | 1206 void Simulator::WriteDW(int32_t addr, int32_t value1, int32_t value2) { |
1218 #if V8_TARGET_CAN_READ_UNALIGNED | 1207 if (FLAG_enable_unaligned_accesses) { |
1219 int32_t* ptr = reinterpret_cast<int32_t*>(addr); | |
1220 *ptr++ = value1; | |
1221 *ptr = value2; | |
1222 return; | |
1223 #else | |
1224 if ((addr & 3) == 0) { | |
1225 int32_t* ptr = reinterpret_cast<int32_t*>(addr); | 1208 int32_t* ptr = reinterpret_cast<int32_t*>(addr); |
1226 *ptr++ = value1; | 1209 *ptr++ = value1; |
1227 *ptr = value2; | 1210 *ptr = value2; |
1228 return; | 1211 } else if ((addr & 3) == 0) { |
1212 int32_t* ptr = reinterpret_cast<int32_t*>(addr); | |
1213 *ptr++ = value1; | |
1214 *ptr = value2; | |
1215 } else { | |
1216 PrintF("Unaligned write at 0x%08x\n", addr); | |
1217 UNIMPLEMENTED(); | |
1229 } | 1218 } |
1230 PrintF("Unaligned write at 0x%08x\n", addr); | |
1231 UNIMPLEMENTED(); | |
1232 #endif | |
1233 } | 1219 } |
1234 | 1220 |
1235 | 1221 |
1236 // Returns the limit of the stack area to enable checking for stack overflows. | 1222 // Returns the limit of the stack area to enable checking for stack overflows. |
1237 uintptr_t Simulator::StackLimit() const { | 1223 uintptr_t Simulator::StackLimit() const { |
1238 // Leave a safety margin of 1024 bytes to prevent overrunning the stack when | 1224 // Leave a safety margin of 1024 bytes to prevent overrunning the stack when |
1239 // pushing values. | 1225 // pushing values. |
1240 return reinterpret_cast<uintptr_t>(stack_) + 1024; | 1226 return reinterpret_cast<uintptr_t>(stack_) + 1024; |
1241 } | 1227 } |
1242 | 1228 |
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3415 uintptr_t address = *stack_slot; | 3401 uintptr_t address = *stack_slot; |
3416 set_register(sp, current_sp + sizeof(uintptr_t)); | 3402 set_register(sp, current_sp + sizeof(uintptr_t)); |
3417 return address; | 3403 return address; |
3418 } | 3404 } |
3419 | 3405 |
3420 } } // namespace v8::internal | 3406 } } // namespace v8::internal |
3421 | 3407 |
3422 #endif // USE_SIMULATOR | 3408 #endif // USE_SIMULATOR |
3423 | 3409 |
3424 #endif // V8_TARGET_ARCH_ARM | 3410 #endif // V8_TARGET_ARCH_ARM |
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