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Issue 11040025: Revert r12646 "Support for SDIV" because of failing V8 benchmark. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 8 years, 2 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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504 public: 504 public:
505 // Detect features of the target CPU. Set safe defaults if the serializer 505 // Detect features of the target CPU. Set safe defaults if the serializer
506 // is enabled (snapshots must be portable). 506 // is enabled (snapshots must be portable).
507 static void Probe(); 507 static void Probe();
508 508
509 // Check whether a feature is supported by the target CPU. 509 // Check whether a feature is supported by the target CPU.
510 static bool IsSupported(CpuFeature f) { 510 static bool IsSupported(CpuFeature f) {
511 ASSERT(initialized_); 511 ASSERT(initialized_);
512 if (f == VFP3 && !FLAG_enable_vfp3) return false; 512 if (f == VFP3 && !FLAG_enable_vfp3) return false;
513 if (f == VFP2 && !FLAG_enable_vfp2) return false; 513 if (f == VFP2 && !FLAG_enable_vfp2) return false;
514 if (f == SUDIV && !FLAG_enable_sudiv) return false;
515 return (supported_ & (1u << f)) != 0; 514 return (supported_ & (1u << f)) != 0;
516 } 515 }
517 516
518 #ifdef DEBUG 517 #ifdef DEBUG
519 // Check whether a feature is currently enabled. 518 // Check whether a feature is currently enabled.
520 static bool IsEnabled(CpuFeature f) { 519 static bool IsEnabled(CpuFeature f) {
521 ASSERT(initialized_); 520 ASSERT(initialized_);
522 Isolate* isolate = Isolate::UncheckedCurrent(); 521 Isolate* isolate = Isolate::UncheckedCurrent();
523 if (isolate == NULL) { 522 if (isolate == NULL) {
524 // When no isolate is available, work as if we're running in 523 // When no isolate is available, work as if we're running in
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863 SBit s = LeaveCC, Condition cond = al); 862 SBit s = LeaveCC, Condition cond = al);
864 863
865 void mvn(Register dst, const Operand& src, 864 void mvn(Register dst, const Operand& src,
866 SBit s = LeaveCC, Condition cond = al); 865 SBit s = LeaveCC, Condition cond = al);
867 866
868 // Multiply instructions 867 // Multiply instructions
869 868
870 void mla(Register dst, Register src1, Register src2, Register srcA, 869 void mla(Register dst, Register src1, Register src2, Register srcA,
871 SBit s = LeaveCC, Condition cond = al); 870 SBit s = LeaveCC, Condition cond = al);
872 871
873 void mls(Register dst, Register src1, Register src2, Register srcA,
874 Condition cond = al);
875
876 void sdiv(Register dst, Register src1, Register src2,
877 Condition cond = al);
878
879 void mul(Register dst, Register src1, Register src2, 872 void mul(Register dst, Register src1, Register src2,
880 SBit s = LeaveCC, Condition cond = al); 873 SBit s = LeaveCC, Condition cond = al);
881 874
882 void smlal(Register dstL, Register dstH, Register src1, Register src2, 875 void smlal(Register dstL, Register dstH, Register src1, Register src2,
883 SBit s = LeaveCC, Condition cond = al); 876 SBit s = LeaveCC, Condition cond = al);
884 877
885 void smull(Register dstL, Register dstH, Register src1, Register src2, 878 void smull(Register dstL, Register dstH, Register src1, Register src2,
886 SBit s = LeaveCC, Condition cond = al); 879 SBit s = LeaveCC, Condition cond = al);
887 880
888 void umlal(Register dstL, Register dstH, Register src1, Register src2, 881 void umlal(Register dstL, Register dstH, Register src1, Register src2,
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1475 public: 1468 public:
1476 explicit EnsureSpace(Assembler* assembler) { 1469 explicit EnsureSpace(Assembler* assembler) {
1477 assembler->CheckBuffer(); 1470 assembler->CheckBuffer();
1478 } 1471 }
1479 }; 1472 };
1480 1473
1481 1474
1482 } } // namespace v8::internal 1475 } } // namespace v8::internal
1483 1476
1484 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1477 #endif // V8_ARM_ASSEMBLER_ARM_H_
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