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Side by Side Diff: src/arm/assembler-arm-inl.h

Issue 11037023: Use movw/movt instead of constant pool on ARMv7 (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: More fixes and nit fixes Created 8 years, 2 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 79 matching lines...) Expand 10 before | Expand all | Expand 10 after
90 if (mode == UPDATE_WRITE_BARRIER && host() != NULL && IsCodeTarget(rmode_)) { 90 if (mode == UPDATE_WRITE_BARRIER && host() != NULL && IsCodeTarget(rmode_)) {
91 Object* target_code = Code::GetCodeFromTargetAddress(target); 91 Object* target_code = Code::GetCodeFromTargetAddress(target);
92 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( 92 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
93 host(), this, HeapObject::cast(target_code)); 93 host(), this, HeapObject::cast(target_code));
94 } 94 }
95 } 95 }
96 96
97 97
98 Object* RelocInfo::target_object() { 98 Object* RelocInfo::target_object() {
99 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); 99 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
100 return Memory::Object_at(Assembler::target_address_address_at(pc_)); 100 return reinterpret_cast<Object*>(Assembler::target_address_at(pc_));
101 } 101 }
102 102
103 103
104 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) { 104 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) {
105 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); 105 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
106 return Memory::Object_Handle_at(Assembler::target_address_address_at(pc_)); 106 return Handle<Object>(reinterpret_cast<Object**>(
107 Assembler::target_address_at(pc_)));
107 } 108 }
108 109
109 110
110 Object** RelocInfo::target_object_address() { 111 Object** RelocInfo::target_object_address() {
112 // Provide a "natural pointer" to the embedded object,
113 // which can be de-referenced during heap iteration.
111 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); 114 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
112 return reinterpret_cast<Object**>(Assembler::target_address_address_at(pc_)); 115 reconstructed_obj_ptr_ =
116 reinterpret_cast<Object*>(Assembler::target_address_at(pc_));
117 return &reconstructed_obj_ptr_;
113 } 118 }
114 119
115 120
116 void RelocInfo::set_target_object(Object* target, WriteBarrierMode mode) { 121 void RelocInfo::set_target_object(Object* target, WriteBarrierMode mode) {
117 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); 122 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
118 Assembler::set_target_address_at(pc_, reinterpret_cast<Address>(target)); 123 Assembler::set_target_address_at(pc_, reinterpret_cast<Address>(target));
119 if (mode == UPDATE_WRITE_BARRIER && 124 if (mode == UPDATE_WRITE_BARRIER &&
120 host() != NULL && 125 host() != NULL &&
121 target->IsHeapObject()) { 126 target->IsHeapObject()) {
122 host()->GetHeap()->incremental_marking()->RecordWrite( 127 host()->GetHeap()->incremental_marking()->RecordWrite(
123 host(), &Memory::Object_at(pc_), HeapObject::cast(target)); 128 host(), &Memory::Object_at(pc_), HeapObject::cast(target));
124 } 129 }
125 } 130 }
126 131
127 132
128 Address* RelocInfo::target_reference_address() { 133 Address* RelocInfo::target_reference_address() {
129 ASSERT(rmode_ == EXTERNAL_REFERENCE); 134 ASSERT(rmode_ == EXTERNAL_REFERENCE);
130 return reinterpret_cast<Address*>(Assembler::target_address_address_at(pc_)); 135 reconstructed_adr_ptr_ = Assembler::target_address_at(pc_);
136 return &reconstructed_adr_ptr_;
131 } 137 }
132 138
133 139
134 Handle<JSGlobalPropertyCell> RelocInfo::target_cell_handle() { 140 Handle<JSGlobalPropertyCell> RelocInfo::target_cell_handle() {
135 ASSERT(rmode_ == RelocInfo::GLOBAL_PROPERTY_CELL); 141 ASSERT(rmode_ == RelocInfo::GLOBAL_PROPERTY_CELL);
136 Address address = Memory::Address_at(pc_); 142 Address address = Memory::Address_at(pc_);
137 return Handle<JSGlobalPropertyCell>( 143 return Handle<JSGlobalPropertyCell>(
138 reinterpret_cast<JSGlobalPropertyCell**>(address)); 144 reinterpret_cast<JSGlobalPropertyCell**>(address));
139 } 145 }
140 146
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350 ASSERT(IsLdrPcImmediateOffset(instr)); 356 ASSERT(IsLdrPcImmediateOffset(instr));
351 int offset = instr & 0xfff; // offset_12 is unsigned 357 int offset = instr & 0xfff; // offset_12 is unsigned
352 if ((instr & (1 << 23)) == 0) offset = -offset; // U bit defines offset sign 358 if ((instr & (1 << 23)) == 0) offset = -offset; // U bit defines offset sign
353 // Verify that the constant pool comes after the instruction referencing it. 359 // Verify that the constant pool comes after the instruction referencing it.
354 ASSERT(offset >= -4); 360 ASSERT(offset >= -4);
355 return target_pc + offset + 8; 361 return target_pc + offset + 8;
356 } 362 }
357 363
358 364
359 Address Assembler::target_address_at(Address pc) { 365 Address Assembler::target_address_at(Address pc) {
366 if (IsMovW(Memory::int32_at(pc))) {
367 ASSERT(IsMovT(Memory::int32_at(pc + 4)));
Please use jfb - chromium.org 2012/10/10 13:56:52 + kInstrSize
danno 2012/10/17 10:04:44 Done.
368 Instruction* instr = Instruction::At(pc);
369 Instruction* next_instr = Instruction::At(pc + 4);
Please use jfb - chromium.org 2012/10/10 13:56:52 + kInstrSize
danno 2012/10/17 10:04:44 Done.
370 return reinterpret_cast<Address>(
371 (next_instr->ImmedMovwMovtValue() << 16) |
372 instr->ImmedMovwMovtValue());
Please use jfb - chromium.org 2012/10/10 13:56:52 The bottom two bits should be zero, which might be
danno 2012/10/17 10:04:44 Done.
373 }
360 return Memory::Address_at(target_address_address_at(pc)); 374 return Memory::Address_at(target_address_address_at(pc));
361 } 375 }
362 376
363 377
378 Address Assembler::target_address_from_return_address(Address pc) {
379 // Returns the address of the call target from the return address that will
380 // be returned to after a call.
381 #ifdef USE_BLX
382 // Call sequence on V7 or later is :
383 // movw ip, #... @ call address low 16
384 // movt ip, #... @ call address high 16
385 // blx ip
386 // @ return address
387 // Or pre v8:
Please use jfb - chromium.org 2012/10/10 13:56:52 Pre v8?
danno 2012/10/17 10:04:44 Done.
388 // ldr ip, [pc, #...] @ call address
389 // blx ip
390 // @ return address
391 Address candidate = pc - 2 * Assembler::kInstrSize;
392 Instr candidate_instr(Memory::int32_at(candidate));
393 if (IsLdrPcImmediateOffset(candidate_instr)) {
394 return candidate;
395 }
396 candidate = pc - 3 * Assembler::kInstrSize;
397 ASSERT(IsMovW(Memory::int32_at(candidate)) &&
398 IsMovT(Memory::int32_at(candidate + 4)));
Please use jfb - chromium.org 2012/10/10 13:56:52 + kInstrSize
danno 2012/10/17 10:04:44 Done.
399 return candidate;
400 #else
401 // Call sequence is:
402 // mov lr, pc
403 // ldr pc, [pc, #...] @ call address
404 // @ return address
405 return pc - kInstrSize;
406 #endif
407 }
408
409
410 Address Assembler::return_address_from_call_start(Address pc) {
411 #ifdef USE_BLX
412 if (IsLdrPcImmediateOffset(Memory::int32_at(pc))) {
413 return pc + kInstrSize * 2;
414 } else {
415 ASSERT(IsMovW(Memory::int32_at(pc)));
416 ASSERT(IsMovT(Memory::int32_at(pc+4)));
417 return pc + kInstrSize * 3;
418 }
419 #else
420 return pc + kInstrSize;
421 #endif
422 }
423
424
364 void Assembler::deserialization_set_special_target_at( 425 void Assembler::deserialization_set_special_target_at(
365 Address constant_pool_entry, Address target) { 426 Address constant_pool_entry, Address target) {
366 Memory::Address_at(constant_pool_entry) = target; 427 Memory::Address_at(constant_pool_entry) = target;
367 } 428 }
368 429
369 430
370 void Assembler::set_external_target_at(Address constant_pool_entry, 431 void Assembler::set_external_target_at(Address constant_pool_entry,
371 Address target) { 432 Address target) {
372 Memory::Address_at(constant_pool_entry) = target; 433 Memory::Address_at(constant_pool_entry) = target;
373 } 434 }
374 435
375 436
437 static Instr EncodeMovwImmediate(uint32_t immediate) {
438 ASSERT(immediate < 0x10000);
439 return ((immediate & 0xf000) << 4) | (immediate & 0xfff);
440 }
441
442
376 void Assembler::set_target_address_at(Address pc, Address target) { 443 void Assembler::set_target_address_at(Address pc, Address target) {
Please use jfb - chromium.org 2012/10/10 13:56:52 As noted above: target &= ~3;
danno 2012/10/17 10:04:44 Done.
377 Memory::Address_at(target_address_address_at(pc)) = target; 444 if (IsMovW(Memory::int32_at(pc))) {
378 // Intuitively, we would think it is necessary to flush the instruction cache 445 ASSERT(IsMovT(Memory::int32_at(pc + 4)));
Please use jfb - chromium.org 2012/10/10 13:56:52 + kInstrSize
danno 2012/10/17 10:04:44 Done.
379 // after patching a target address in the code as follows: 446 uint32_t* instr_ptr = reinterpret_cast<uint32_t*>(pc);
380 // CPU::FlushICache(pc, sizeof(target)); 447 uint32_t immediate = reinterpret_cast<uint32_t>(target);
381 // However, on ARM, no instruction was actually patched by the assignment 448 uint32_t intermediate = instr_ptr[0];
382 // above; the target address is not part of an instruction, it is patched in 449 intermediate &= ~EncodeMovwImmediate(0xFFFF);
383 // the constant pool and is read via a data access; the instruction accessing 450 intermediate |= EncodeMovwImmediate(immediate & 0xFFFF);
384 // this address in the constant pool remains unchanged. 451 instr_ptr[0] = intermediate;
452 intermediate = instr_ptr[1];
453 intermediate &= ~EncodeMovwImmediate(0xFFFF);
454 intermediate |= EncodeMovwImmediate(immediate >> 16);
455 instr_ptr[1] = intermediate;
456 ASSERT(IsMovW(Memory::int32_at(pc)));
457 ASSERT(IsMovT(Memory::int32_at(pc + 4)));
Please use jfb - chromium.org 2012/10/10 13:56:52 + kInstrSize
danno 2012/10/17 10:04:44 Done.
458 CPU::FlushICache(pc, 2 * kInstrSize);
459 } else {
460 Memory::Address_at(target_address_address_at(pc)) = target;
461 // Intuitively, we would think it is necessary to flush the instruction
462 // cache after patching a target address in the code as follows:
463 // CPU::FlushICache(pc, sizeof(target));
464 // However, on ARM, no instruction was actually patched by the assignment
465 // above; the target address is not part of an instruction, it is patched in
466 // the constant pool and is read via a data access; the instruction
467 // accessing this address in the constant pool remains unchanged.
Please use jfb - chromium.org 2012/10/10 13:56:52 Is this actually true? I can't find a reference to
danno 2012/10/17 10:04:44 Done.
468 }
385 } 469 }
386 470
387 } } // namespace v8::internal 471 } } // namespace v8::internal
388 472
389 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ 473 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_
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