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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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1014 } | 1014 } |
1015 | 1015 |
1016 void rcr(Register dst, Immediate imm8) { | 1016 void rcr(Register dst, Immediate imm8) { |
1017 shift(dst, imm8, 0x3); | 1017 shift(dst, imm8, 0x3); |
1018 } | 1018 } |
1019 | 1019 |
1020 void ror(Register dst, Immediate imm8) { | 1020 void ror(Register dst, Immediate imm8) { |
1021 shift(dst, imm8, 0x1); | 1021 shift(dst, imm8, 0x1); |
1022 } | 1022 } |
1023 | 1023 |
| 1024 void rorl(Register dst, Immediate imm8) { |
| 1025 shift_32(dst, imm8, 0x1); |
| 1026 } |
| 1027 |
| 1028 void rorl_cl(Register dst) { |
| 1029 shift_32(dst, 0x1); |
| 1030 } |
| 1031 |
1024 // Shifts dst:src left by cl bits, affecting only dst. | 1032 // Shifts dst:src left by cl bits, affecting only dst. |
1025 void shld(Register dst, Register src); | 1033 void shld(Register dst, Register src); |
1026 | 1034 |
1027 // Shifts src:dst right by cl bits, affecting only dst. | 1035 // Shifts src:dst right by cl bits, affecting only dst. |
1028 void shrd(Register dst, Register src); | 1036 void shrd(Register dst, Register src); |
1029 | 1037 |
1030 // Shifts dst right, duplicating sign bit, by shift_amount bits. | 1038 // Shifts dst right, duplicating sign bit, by shift_amount bits. |
1031 // Shifting by 1 is handled efficiently. | 1039 // Shifting by 1 is handled efficiently. |
1032 void sar(Register dst, Immediate shift_amount) { | 1040 void sar(Register dst, Immediate shift_amount) { |
1033 shift(dst, shift_amount, 0x7); | 1041 shift(dst, shift_amount, 0x7); |
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1677 private: | 1685 private: |
1678 Assembler* assembler_; | 1686 Assembler* assembler_; |
1679 #ifdef DEBUG | 1687 #ifdef DEBUG |
1680 int space_before_; | 1688 int space_before_; |
1681 #endif | 1689 #endif |
1682 }; | 1690 }; |
1683 | 1691 |
1684 } } // namespace v8::internal | 1692 } } // namespace v8::internal |
1685 | 1693 |
1686 #endif // V8_X64_ASSEMBLER_X64_H_ | 1694 #endif // V8_X64_ASSEMBLER_X64_H_ |
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