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Side by Side Diff: src/ia32/assembler-ia32.h

Issue 11033005: Add rotate-right instruction to hydrogen and use it instead of bitwise operations (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: rebase Created 8 years, 1 month ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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810 810
811 void or_(Register dst, int32_t imm32); 811 void or_(Register dst, int32_t imm32);
812 void or_(Register dst, Register src) { or_(dst, Operand(src)); } 812 void or_(Register dst, Register src) { or_(dst, Operand(src)); }
813 void or_(Register dst, const Operand& src); 813 void or_(Register dst, const Operand& src);
814 void or_(const Operand& dst, Register src); 814 void or_(const Operand& dst, Register src);
815 void or_(Register dst, const Immediate& imm) { or_(Operand(dst), imm); } 815 void or_(Register dst, const Immediate& imm) { or_(Operand(dst), imm); }
816 void or_(const Operand& dst, const Immediate& x); 816 void or_(const Operand& dst, const Immediate& x);
817 817
818 void rcl(Register dst, uint8_t imm8); 818 void rcl(Register dst, uint8_t imm8);
819 void rcr(Register dst, uint8_t imm8); 819 void rcr(Register dst, uint8_t imm8);
820 void ror(Register dst, uint8_t imm8);
821 void ror_cl(Register dst);
820 822
821 void sar(Register dst, uint8_t imm8); 823 void sar(Register dst, uint8_t imm8);
822 void sar_cl(Register dst); 824 void sar_cl(Register dst);
823 825
824 void sbb(Register dst, const Operand& src); 826 void sbb(Register dst, const Operand& src);
825 827
826 void shld(Register dst, Register src) { shld(dst, Operand(src)); } 828 void shld(Register dst, Register src) { shld(dst, Operand(src)); }
827 void shld(Register dst, const Operand& src); 829 void shld(Register dst, const Operand& src);
828 830
829 void shl(Register dst, uint8_t imm8); 831 void shl(Register dst, uint8_t imm8);
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1229 private: 1231 private:
1230 Assembler* assembler_; 1232 Assembler* assembler_;
1231 #ifdef DEBUG 1233 #ifdef DEBUG
1232 int space_before_; 1234 int space_before_;
1233 #endif 1235 #endif
1234 }; 1236 };
1235 1237
1236 } } // namespace v8::internal 1238 } } // namespace v8::internal
1237 1239
1238 #endif // V8_IA32_ASSEMBLER_IA32_H_ 1240 #endif // V8_IA32_ASSEMBLER_IA32_H_
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