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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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1057 if (imm8 == 1) { | 1057 if (imm8 == 1) { |
1058 EMIT(0xD1); | 1058 EMIT(0xD1); |
1059 EMIT(0xD8 | dst.code()); | 1059 EMIT(0xD8 | dst.code()); |
1060 } else { | 1060 } else { |
1061 EMIT(0xC1); | 1061 EMIT(0xC1); |
1062 EMIT(0xD8 | dst.code()); | 1062 EMIT(0xD8 | dst.code()); |
1063 EMIT(imm8); | 1063 EMIT(imm8); |
1064 } | 1064 } |
1065 } | 1065 } |
1066 | 1066 |
| 1067 void Assembler::ror(Register dst, uint8_t imm8) { |
| 1068 EnsureSpace ensure_space(this); |
| 1069 ASSERT(is_uint5(imm8)); // illegal shift count |
| 1070 if (imm8 == 1) { |
| 1071 EMIT(0xD1); |
| 1072 EMIT(0xC8 | dst.code()); |
| 1073 } else { |
| 1074 EMIT(0xC1); |
| 1075 EMIT(0xC8 | dst.code()); |
| 1076 EMIT(imm8); |
| 1077 } |
| 1078 } |
| 1079 |
| 1080 void Assembler::ror_cl(Register dst) { |
| 1081 EnsureSpace ensure_space(this); |
| 1082 EMIT(0xD3); |
| 1083 EMIT(0xC8 | dst.code()); |
| 1084 } |
| 1085 |
1067 | 1086 |
1068 void Assembler::sar(Register dst, uint8_t imm8) { | 1087 void Assembler::sar(Register dst, uint8_t imm8) { |
1069 EnsureSpace ensure_space(this); | 1088 EnsureSpace ensure_space(this); |
1070 ASSERT(is_uint5(imm8)); // illegal shift count | 1089 ASSERT(is_uint5(imm8)); // illegal shift count |
1071 if (imm8 == 1) { | 1090 if (imm8 == 1) { |
1072 EMIT(0xD1); | 1091 EMIT(0xD1); |
1073 EMIT(0xF8 | dst.code()); | 1092 EMIT(0xF8 | dst.code()); |
1074 } else { | 1093 } else { |
1075 EMIT(0xC1); | 1094 EMIT(0xC1); |
1076 EMIT(0xF8 | dst.code()); | 1095 EMIT(0xF8 | dst.code()); |
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2646 fprintf(coverage_log, "%s\n", file_line); | 2665 fprintf(coverage_log, "%s\n", file_line); |
2647 fflush(coverage_log); | 2666 fflush(coverage_log); |
2648 } | 2667 } |
2649 } | 2668 } |
2650 | 2669 |
2651 #endif | 2670 #endif |
2652 | 2671 |
2653 } } // namespace v8::internal | 2672 } } // namespace v8::internal |
2654 | 2673 |
2655 #endif // V8_TARGET_ARCH_IA32 | 2674 #endif // V8_TARGET_ARCH_IA32 |
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