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Side by Side Diff: src/ia32/assembler-ia32.h

Issue 11033005: Add rotate-right instruction to hydrogen and use it instead of bitwise operations (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 8 years, 2 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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805 805
806 void or_(Register dst, int32_t imm32); 806 void or_(Register dst, int32_t imm32);
807 void or_(Register dst, Register src) { or_(dst, Operand(src)); } 807 void or_(Register dst, Register src) { or_(dst, Operand(src)); }
808 void or_(Register dst, const Operand& src); 808 void or_(Register dst, const Operand& src);
809 void or_(const Operand& dst, Register src); 809 void or_(const Operand& dst, Register src);
810 void or_(Register dst, const Immediate& imm) { or_(Operand(dst), imm); } 810 void or_(Register dst, const Immediate& imm) { or_(Operand(dst), imm); }
811 void or_(const Operand& dst, const Immediate& x); 811 void or_(const Operand& dst, const Immediate& x);
812 812
813 void rcl(Register dst, uint8_t imm8); 813 void rcl(Register dst, uint8_t imm8);
814 void rcr(Register dst, uint8_t imm8); 814 void rcr(Register dst, uint8_t imm8);
815 void ror(Register dst, uint8_t imm8);
816 void ror_cl(Register dst);
815 817
816 void sar(Register dst, uint8_t imm8); 818 void sar(Register dst, uint8_t imm8);
817 void sar_cl(Register dst); 819 void sar_cl(Register dst);
818 820
819 void sbb(Register dst, const Operand& src); 821 void sbb(Register dst, const Operand& src);
820 822
821 void shld(Register dst, Register src) { shld(dst, Operand(src)); } 823 void shld(Register dst, Register src) { shld(dst, Operand(src)); }
822 void shld(Register dst, const Operand& src); 824 void shld(Register dst, const Operand& src);
823 825
824 void shl(Register dst, uint8_t imm8); 826 void shl(Register dst, uint8_t imm8);
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1224 private: 1226 private:
1225 Assembler* assembler_; 1227 Assembler* assembler_;
1226 #ifdef DEBUG 1228 #ifdef DEBUG
1227 int space_before_; 1229 int space_before_;
1228 #endif 1230 #endif
1229 }; 1231 };
1230 1232
1231 } } // namespace v8::internal 1233 } } // namespace v8::internal
1232 1234
1233 #endif // V8_IA32_ASSEMBLER_IA32_H_ 1235 #endif // V8_IA32_ASSEMBLER_IA32_H_
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