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1 /* | 1 /* |
2 * Copyright (c) 2012 The Native Client Authors. All rights reserved. | 2 * Copyright (c) 2012 The Native Client Authors. All rights reserved. |
3 * Use of this source code is governed by a BSD-style license that can be | 3 * Use of this source code is governed by a BSD-style license that can be |
4 * found in the LICENSE file. | 4 * found in the LICENSE file. |
5 */ | 5 */ |
6 | 6 |
7 /* | 7 /* |
8 * This file contains common parts of x86-32 and x86-64 internals (inline | 8 * This file contains common parts of x86-32 and x86-64 internals (inline |
9 * functions and defines). | 9 * functions and defines). |
10 */ | 10 */ |
11 | 11 |
12 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODING_H_ | 12 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODING_H_ |
13 #define NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODING_H_ | 13 #define NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODING_H_ |
14 | 14 |
15 #include "native_client/src/trusted/validator_ragel/unreviewed/decoder.h" | 15 #include "native_client/src/trusted/validator_ragel/decoder.h" |
16 | 16 |
17 #if NACL_WINDOWS | 17 #if NACL_WINDOWS |
18 # define FORCEINLINE __forceinline | 18 # define FORCEINLINE __forceinline |
19 #else | 19 #else |
20 # define FORCEINLINE __inline __attribute__ ((always_inline)) | 20 # define FORCEINLINE __inline __attribute__ ((always_inline)) |
21 #endif | 21 #endif |
22 | 22 |
| 23 enum { |
| 24 REX_B = 1, |
| 25 REX_X = 2, |
| 26 REX_R = 4, |
| 27 REX_W = 8 |
| 28 }; |
| 29 |
23 static FORCEINLINE uint8_t RegFromOpcode(uint8_t modrm) { | 30 static FORCEINLINE uint8_t RegFromOpcode(uint8_t modrm) { |
24 return modrm & 0x07; | 31 return modrm & 0x07; |
25 } | 32 } |
26 | 33 |
27 static FORCEINLINE uint8_t ModFromModRM(uint8_t modrm) { | 34 static FORCEINLINE uint8_t ModFromModRM(uint8_t modrm) { |
28 return modrm >> 6; | 35 return modrm >> 6; |
29 } | 36 } |
30 | 37 |
31 static FORCEINLINE uint8_t RegFromModRM(uint8_t modrm) { | 38 static FORCEINLINE uint8_t RegFromModRM(uint8_t modrm) { |
32 return (modrm & 0x38) >> 3; | 39 return (modrm & 0x38) >> 3; |
33 } | 40 } |
34 | 41 |
35 static FORCEINLINE uint8_t RMFromModRM(uint8_t modrm) { | 42 static FORCEINLINE uint8_t RMFromModRM(uint8_t modrm) { |
36 return modrm & 0x07; | 43 return modrm & 0x07; |
37 } | 44 } |
38 | 45 |
39 static FORCEINLINE uint8_t ScaleFromSIB(uint8_t sib) { | 46 static FORCEINLINE uint8_t ScaleFromSIB(uint8_t sib) { |
40 return sib >> 6; | 47 return sib >> 6; |
41 } | 48 } |
42 | 49 |
43 static FORCEINLINE uint8_t IndexFromSIB(uint8_t sib) { | 50 static FORCEINLINE uint8_t IndexFromSIB(uint8_t sib) { |
44 return (sib & 0x38) >> 3; | 51 return (sib & 0x38) >> 3; |
45 } | 52 } |
46 | 53 |
47 static FORCEINLINE uint8_t BaseFromSIB(uint8_t sib) { | 54 static FORCEINLINE uint8_t BaseFromSIB(uint8_t sib) { |
48 return sib & 0x07; | 55 return sib & 0x07; |
49 } | 56 } |
50 | 57 |
51 static FORCEINLINE uint8_t BaseExtentionFromREX(uint8_t rex) { | 58 static FORCEINLINE uint8_t BaseExtentionFromREX(uint8_t rex) { |
52 return (rex & 0x01) << 3; | 59 return (rex & REX_B) << 3; |
53 } | 60 } |
54 | 61 |
55 static FORCEINLINE uint8_t BaseExtentionFromVEX(uint8_t vex2) { | 62 static FORCEINLINE uint8_t BaseExtentionFromVEX(uint8_t vex2) { |
56 return ((~vex2) & 0x20) >> 2; | 63 return ((~vex2) & 0x20) >> 2; |
57 } | 64 } |
58 | 65 |
59 static FORCEINLINE uint8_t IndexExtentionFromREX(uint8_t rex) { | 66 static FORCEINLINE uint8_t IndexExtentionFromREX(uint8_t rex) { |
60 return (rex & 0x02) << 2; | 67 return (rex & REX_X) << 2; |
61 } | 68 } |
62 | 69 |
63 static FORCEINLINE uint8_t IndexExtentionFromVEX(uint8_t vex2) { | 70 static FORCEINLINE uint8_t IndexExtentionFromVEX(uint8_t vex2) { |
64 return ((~vex2) & 0x40) >> 3; | 71 return ((~vex2) & REX_R) >> 3; |
65 } | 72 } |
66 | 73 |
67 static FORCEINLINE uint8_t RegisterExtentionFromREX(uint8_t rex) { | 74 static FORCEINLINE uint8_t RegisterExtentionFromREX(uint8_t rex) { |
68 return (rex & 0x04) << 1; | 75 return (rex & 0x04) << 1; |
69 } | 76 } |
70 | 77 |
71 static FORCEINLINE uint8_t RegisterExtentionFromVEX(uint8_t vex2) { | 78 static FORCEINLINE uint8_t RegisterExtentionFromVEX(uint8_t vex2) { |
72 return ((~vex2) & 0x80) >> 4; | 79 return ((~vex2) & REX_W) >> 4; |
73 } | 80 } |
74 | 81 |
75 static FORCEINLINE uint8_t GetOperandFromVexIA32(uint8_t vex3) { | 82 static FORCEINLINE uint8_t GetOperandFromVexIA32(uint8_t vex3) { |
76 return ((~vex3) & 0x38) >> 3; | 83 return ((~vex3) & 0x38) >> 3; |
77 } | 84 } |
78 | 85 |
79 static FORCEINLINE uint8_t GetOperandFromVexAMD64(uint8_t vex3) { | 86 static FORCEINLINE uint8_t GetOperandFromVexAMD64(uint8_t vex3) { |
80 return ((~vex3) & 0x78) >> 3; | 87 return ((~vex3) & 0x78) >> 3; |
81 } | 88 } |
82 | 89 |
83 static FORCEINLINE uint8_t RegisterFromIS4(uint8_t is4) { | 90 static FORCEINLINE uint8_t RegisterFromIS4(uint8_t is4) { |
84 return is4 >> 4; | 91 return is4 >> 4; |
85 } | 92 } |
86 | 93 |
| 94 /* |
| 95 * SignExtendXXBit is used to sign-extend XX-bit value to unsigned 64-bit value. |
| 96 * |
| 97 * To do that you need to pass unsigned value of smaller then 64-bit size |
| 98 * to this function: it will be converted to signed value and then |
| 99 * sign-extended to become 64-bit value. |
| 100 * |
| 101 * Smaller values can be obtained by restricting this value further (which is |
| 102 * safe according to the C language specification: see 6.2.1.2 in C90 and |
| 103 * 6.3.1.3.2 in C99 specification). |
| 104 * |
| 105 * Note that these operations are safe but slightly unusual: they come very |
| 106 * close to the edge of what “well-behaved C program is not supposed to do”, |
| 107 * but they stay on the “safe” side of this boundary. Specifically: this |
| 108 * behavior triggers “implementation-defined behavior” (see 6.2.1.2 in C90 |
| 109 * specification and 6.3.1.3.3 in C99 specification) which sounds suspiciously |
| 110 * similar to the dreaded “undefined behavior”, but in reality these two are |
| 111 * quite different: any program which triggers “undefined behavior” is not a |
| 112 * valid C program at all, but program which triggers “implementation-defined |
| 113 * behavior” is quite valid C program. What this program actually *does* |
| 114 * depends on the specification of a given C compiler: each particular |
| 115 * implementation must decide for itself what it'll do in this particular case |
| 116 * and *stick* *to* *it*. If the implementation uses two's-complement negative |
| 117 * numbers (and all the implementation which can compile this code *must* |
| 118 * support two's-complement arythmetic—see 7.18.1.1 in C99 specification) then |
| 119 * the easiest thing to do is to do what we need here—this is what all known |
| 120 * compilers for all known platforms are actually doing. |
| 121 */ |
| 122 static FORCEINLINE uint64_t SignExtend8Bit(int8_t value) { |
| 123 return value; |
| 124 } |
| 125 |
| 126 static FORCEINLINE uint64_t SignExtend16Bit(int16_t value) { |
| 127 return value; |
| 128 } |
| 129 |
| 130 static FORCEINLINE uint64_t SignExtend32Bit(int32_t value) { |
| 131 return value; |
| 132 } |
| 133 |
| 134 static FORCEINLINE uint64_t AnyFieldValue8bit(const uint8_t *start) { |
| 135 return *start; |
| 136 } |
| 137 |
| 138 static FORCEINLINE uint64_t AnyFieldValue16bit(const uint8_t *start) { |
| 139 return (start[0] + 256U * start[1]); |
| 140 } |
| 141 |
| 142 static FORCEINLINE uint64_t AnyFieldValue32bit(const uint8_t *start) { |
| 143 return (start[0] + 256U * (start[1] + 256U * (start[2] + 256U * (start[3])))); |
| 144 } |
| 145 static FORCEINLINE uint64_t AnyFieldValue64bit(const uint8_t *start) { |
| 146 return (*start + 256ULL * (start[1] + 256ULL * (start[2] + 256ULL * |
| 147 (start[3] + 256ULL * (start[4] + 256ULL * (start[5] + 256ULL * |
| 148 (start[6] + 256ULL * start[7]))))))); |
| 149 } |
87 static const uint8_t index_registers[] = { | 150 static const uint8_t index_registers[] = { |
88 /* Note how REG_RIZ falls out of the pattern. */ | 151 /* Note how REG_RIZ falls out of the pattern. */ |
89 REG_RAX, REG_RCX, REG_RDX, REG_RBX, | 152 REG_RAX, REG_RCX, REG_RDX, REG_RBX, |
90 REG_RIZ, REG_RBP, REG_RSI, REG_RDI, | 153 REG_RIZ, REG_RBP, REG_RSI, REG_RDI, |
91 REG_R8, REG_R9, REG_R10, REG_R11, | 154 REG_R8, REG_R9, REG_R10, REG_R11, |
92 REG_R12, REG_R13, REG_R14, REG_R15 | 155 REG_R12, REG_R13, REG_R14, REG_R15 |
93 }; | 156 }; |
94 | 157 |
95 #endif /* NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODING_H_ */ | 158 #endif /* NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODING_H_ */ |
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