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Issue 11000033: Move validator_x86_XX.rl out of unreviewed. (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/
Patch Set: Created 8 years, 2 months ago
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« src/trusted/validator_ragel/unreviewed/decoder_test.c ('K') | « src/trusted/validator_ragel/unreviewed/decoder_x86_32.rl ('k') | src/trusted/validator_ragel/unreviewed/decoding.h » ('j') | src/trusted/validator_ragel/unreviewed/parse_instruction.rl » ('J')
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1 /*
2 * Copyright (c) 2011 The Native Client Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
7 #include <assert.h>
8 #include <stddef.h>
9 #include <stdio.h>
10 #include <stdlib.h>
11 #include <string.h>
12
13 #include "native_client/src/include/elf32.h"
14 #include "native_client/src/shared/utils/types.h"
15 #include "native_client/src/trusted/validator_ragel/unreviewed/decoding.h"
16
17 #include "native_client/src/trusted/validator_ragel/gen/decoder_x86_64_instructi on_consts.h"
18
19 %%{
20 machine x86_64_decoder;
21 alphtype unsigned char;
22 variable p current_position;
23 variable pe end_of_data;
24 variable eof end_of_data;
25 variable cs current_state;
26
27 include byte_machine "byte_machines.rl";
28
29 include prefix_actions
30 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
31 include prefixes_parsing
32 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
33 include rex_actions
34 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
35 include rex_parsing
36 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
37 include vex_actions_amd64
38 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
39 include vex_parsing_amd64
40 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
41 include displacement_fields_actions
42 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
43 include displacement_fields_parsing
44 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
45 include modrm_actions_amd64
46 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
47 include modrm_parsing_amd64
48 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
49 include operand_actions_amd64
50 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
51 include immediate_fields_actions
52 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
53 include immediate_fields_parsing_amd64
54 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
55 include relative_fields_actions
56 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
57 include relative_fields_parsing
58 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
59 include cpuid_actions
60 "native_client/src/trusted/validator_ragel/unreviewed/parse_instruction.rl";
61
62 include decode_x86_64 "decoder_x86_64_instruction.rl";
63
64 main := (one_instruction
65 @{
66 switch (instruction.rm.disp_type) {
67 case DISPNONE: instruction.rm.offset = 0; break;
68 case DISP8: instruction.rm.offset = (int8_t) *disp; break;
69 case DISP16: instruction.rm.offset =
70 (uint16_t) (disp[0] + 256U * disp[1]);
71 break;
72 case DISP32: instruction.rm.offset = (int32_t)
73 (disp[0] + 256U * (disp[1] + 256U * (disp[2] + 256U * (disp[3]))));
74 break;
75 case DISP64: instruction.rm.offset = (int64_t)
76 (*disp + 256ULL * (disp[1] + 256ULL * (disp[2] + 256ULL * (disp[3] +
77 256ULL * (disp[4] + 256ULL * (disp[5] + 256ULL * (disp[6] + 256ULL *
78 disp[7])))))));
79 break;
80 }
81 switch (imm_operand) {
82 case IMMNONE: instruction.imm[0] = 0; break;
83 case IMM2: instruction.imm[0] = imm[0] & 0x03; break;
84 case IMM8: instruction.imm[0] = imm[0]; break;
85 case IMM16: instruction.imm[0] = (uint64_t) (*imm + 256U * (imm[1]));
86 break;
87 case IMM32: instruction.imm[0] = (uint64_t)
88 (imm[0] + 256U * (imm[1] + 256U * (imm[2] + 256U * (imm[3]))));
89 break;
90 case IMM64: instruction.imm[0] = (uint64_t)
91 (imm[0] + 256LL * (imm[1] + 256ULL * (imm[2] + 256ULL * (imm[3] +
92 256ULL * (imm[4] + 256ULL * (imm[5] + 256ULL * (imm[6] + 256ULL *
93 imm[7])))))));
94 break;
95 }
96 switch (imm2_operand) {
97 case IMMNONE: instruction.imm[1] = 0; break;
98 case IMM2: instruction.imm[1] = imm2[0] & 0x03; break;
99 case IMM8: instruction.imm[1] = imm2[0]; break;
100 case IMM16: instruction.imm[1] = (uint64_t)
101 (imm2[0] + 256U * (imm2[1]));
102 break;
103 case IMM32: instruction.imm[1] = (uint64_t)
104 (imm2[0] + 256U * (imm2[1] + 256U * (imm2[2] + 256U * (imm2[3]))));
105 break;
106 case IMM64: instruction.imm[1] = (uint64_t)
107 (*imm2 + 256ULL * (imm2[1] + 256ULL * (imm2[2] + 256ULL * (imm2[3] +
108 256ULL * (imm2[4] + 256ULL * (imm2[5] + 256ULL * (imm2[6] + 256ULL *
109 imm2[7])))))));
110 break;
111 }
112 process_instruction(instruction_start, current_position+1, &instruction,
113 userdata);
114 instruction_start = current_position + 1;
115 SET_DISP_TYPE(DISPNONE);
116 SET_IMM_TYPE(IMMNONE);
117 SET_IMM2_TYPE(IMMNONE);
118 SET_REX_PREFIX(FALSE);
119 SET_DATA16_PREFIX(FALSE);
120 SET_LOCK_PREFIX(FALSE);
121 SET_REPNZ_PREFIX(FALSE);
122 SET_REPZ_PREFIX(FALSE);
123 SET_BRANCH_NOT_TAKEN(FALSE);
124 SET_BRANCH_TAKEN(FALSE);
125 SET_VEX_PREFIX2(0xe0);
126 SET_VEX_PREFIX3(0x00);
127 })*
128 $!{ process_error(current_position, userdata);
129 result = FALSE;
130 goto error_detected;
131 };
132
133 }%%
134
135 %% write data;
136
137 #define GET_REX_PREFIX() instruction.prefix.rex
138 #define SET_REX_PREFIX(P) instruction.prefix.rex = (P)
139 #define GET_VEX_PREFIX2() vex_prefix2
140 #define SET_VEX_PREFIX2(P) vex_prefix2 = (P)
141 #define GET_VEX_PREFIX3() vex_prefix3
142 #define SET_VEX_PREFIX3(P) vex_prefix3 = (P)
143 #define SET_DATA16_PREFIX(S) instruction.prefix.data16 = (S)
144 #define SET_LOCK_PREFIX(S) instruction.prefix.lock = (S)
145 #define SET_REPZ_PREFIX(S) instruction.prefix.repz = (S)
146 #define SET_REPNZ_PREFIX(S) instruction.prefix.repnz = (S)
147 #define SET_BRANCH_TAKEN(S) instruction.prefix.branch_taken = (S)
148 #define SET_BRANCH_NOT_TAKEN(S) instruction.prefix.branch_not_taken = (S)
149 #define SET_INSTRUCTION_NAME(N) instruction.name = (N)
150 #define GET_OPERAND_NAME(N) instruction.operands[(N)].name
151 #define SET_OPERAND_NAME(N, S) instruction.operands[(N)].name = (S)
152 #define SET_OPERAND_TYPE(N, S) instruction.operands[(N)].type = (S)
153 #define SET_OPERANDS_COUNT(N) instruction.operands_count = (N)
154 #define SET_MODRM_BASE(N) instruction.rm.base = (N)
155 #define SET_MODRM_INDEX(N) instruction.rm.index = (N)
156 #define SET_MODRM_SCALE(S) instruction.rm.scale = (S)
157 #define SET_DISP_TYPE(T) instruction.rm.disp_type = (T)
158 #define SET_DISP_PTR(P) disp = (P)
159 #define SET_IMM_TYPE(T) imm_operand = (T)
160 #define SET_IMM_PTR(P) imm = (P)
161 #define SET_IMM2_TYPE(T) imm2_operand = (T)
162 #define SET_IMM2_PTR(P) imm2 = (P)
163 #define SET_CPU_FEATURE(F)
164
165 enum {
166 REX_B = 1,
167 REX_X = 2,
168 REX_R = 4,
169 REX_W = 8
170 };
171
172 enum imm_mode {
173 IMMNONE,
174 IMM2,
175 IMM8,
176 IMM16,
177 IMM32,
178 IMM64
179 };
180
181 int DecodeChunkAMD64(const uint8_t *data, size_t size,
182 process_instruction_func process_instruction,
183 process_decoding_error_func process_error,
184 void *userdata) {
185 const uint8_t *current_position = data;
186 const uint8_t *end_of_data = data + size;
187 const uint8_t *disp = NULL;
188 const uint8_t *imm = NULL;
189 const uint8_t *imm2 = NULL;
190 const uint8_t *instruction_start = current_position;
191 uint8_t vex_prefix2 = 0xe0;
192 uint8_t vex_prefix3 = 0x00;
193 enum imm_mode imm_operand = IMMNONE;
194 enum imm_mode imm2_operand = IMMNONE;
195 struct instruction instruction;
196 int result = TRUE;
197
198 int current_state;
199
200 SET_DISP_TYPE(DISPNONE);
201 SET_IMM_TYPE(IMMNONE);
202 SET_IMM2_TYPE(IMMNONE);
203 SET_REX_PREFIX(FALSE);
204 SET_DATA16_PREFIX(FALSE);
205 SET_LOCK_PREFIX(FALSE);
206 SET_REPNZ_PREFIX(FALSE);
207 SET_REPZ_PREFIX(FALSE);
208 SET_BRANCH_NOT_TAKEN(FALSE);
209 SET_BRANCH_TAKEN(FALSE);
210
211 %% write init;
212 %% write exec;
213
214 error_detected:
215 return result;
216 }
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« src/trusted/validator_ragel/unreviewed/decoder_test.c ('K') | « src/trusted/validator_ragel/unreviewed/decoder_x86_32.rl ('k') | src/trusted/validator_ragel/unreviewed/decoding.h » ('j') | src/trusted/validator_ragel/unreviewed/parse_instruction.rl » ('J')

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