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1 /* | |
2 * Copyright (c) 2012 The Native Client Authors. All rights reserved. | |
3 * Use of this source code is governed by a BSD-style license that can be | |
4 * found in the LICENSE file. | |
5 */ | |
6 | |
7 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODER_H_ | |
8 #define NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODER_H_ | |
9 | |
10 #include "native_client/src/shared/utils/types.h" | |
11 #include "native_client/src/trusted/validator/x86/nacl_cpuid.h" | |
12 | |
13 EXTERN_C_BEGIN | |
14 | |
15 enum operand_type { | |
16 | |
17 /* | |
18 * These are for general-purpose registers, memory access and immediates. | |
19 * They are not used for XMM, MMX etc. | |
20 */ | |
21 OPERAND_SIZE_2_BIT, /* See VPERMIL2Px instruction for description. */ | |
22 OPERAND_SIZE_8_BIT, | |
23 OPERAND_SIZE_16_BIT, | |
24 OPERAND_SIZE_32_BIT, | |
25 OPERAND_SIZE_64_BIT, | |
26 OPERAND_SIZE_128_BIT, | |
27 OPERAND_SIZE_256_BIT, | |
28 | |
29 /* OPERAND_FLOAT_SIZE_*_BIT are used for in-memory operands. */ | |
30 OPERAND_FLOAT_SIZE_16_BIT, | |
31 OPERAND_FLOAT_SIZE_32_BIT, | |
32 OPERAND_FLOAT_SIZE_64_BIT, | |
33 OPERAND_FLOAT_SIZE_80_BIT, | |
34 | |
35 /* OPERAND_X87_SIZE_64_BIT are signed integers in memory.*/ | |
36 OPERAND_X87_SIZE_16_BIT, | |
37 OPERAND_X87_SIZE_32_BIT, | |
38 OPERAND_X87_SIZE_64_BIT, | |
39 | |
40 | |
41 OPERAND_X87_BCD, /* 10-byte packed BCD value in memory. */ | |
42 OPERAND_X87_ENV, /* A 14-byte or 28-byte x87 environment. */ | |
43 OPERAND_X87_STATE, /* A 94-byte or 108-byte x87 state. */ | |
44 OPERAND_X87_MMX_MM_STATE, /* A 512-byte extended x87/MMX/XMM state. */ | |
45 OPERAND_SELECTOR, /* Operand is 6/10 bytes selector in memory. */ | |
46 OPERAND_FAR_PTR, /* Operand is 6/10 bytes far pointer in memory. */ | |
47 | |
48 OPERAND_ST, /* Any X87 register. */ | |
49 OPERAND_SEGMENT_REGISTER, /* Operand is segment register: %{e,c,s,d,f,g}s. */ | |
50 OPERAND_CONTROL_REGISTER, /* Operand is control register: %crX. */ | |
51 OPERAND_DEBUG_REGISTER, /* Operand is debug register: %drX. */ | |
52 OPERAND_MMX, | |
53 OPERAND_XMM, | |
54 OPERAND_YMM | |
55 }; | |
56 | |
57 enum register_name { | |
58 /* First 16 registers are compatible with encoding of registers in x86 ABI. */ | |
59 REG_RAX, | |
60 REG_RCX, | |
61 REG_RDX, | |
62 REG_RBX, | |
63 REG_RSP, | |
64 REG_RBP, | |
65 REG_RSI, | |
66 REG_RDI, | |
67 REG_R8, | |
68 REG_R9, | |
69 REG_R10, | |
70 REG_R11, | |
71 REG_R12, | |
72 REG_R13, | |
73 REG_R14, | |
74 REG_R15, | |
75 /* These are pseudo-registers used in special cases. */ | |
76 REG_RM, /* Address in memory via rm field. */ | |
77 REG_RIP, /* RIP - used as base in x86-64 mode. */ | |
78 REG_RIZ, /* EIZ/RIZ - used as "always zero index" register. */ | |
79 REG_IMM, /* Fixed value in imm field. */ | |
80 REG_IMM2, /* Fixed value in second imm field. */ | |
81 REG_DS_RBX, /* Fox xlat: %ds(%rbx). */ | |
82 REG_ES_RDI, /* For string instructions: %es:(%rsi). */ | |
83 REG_DS_RSI, /* For string instructions: %ds:(%rdi). */ | |
84 REG_PORT_DX, /* 16-bit DX: for in/out instructions. */ | |
85 NO_REG, /* For modrm: both index and base can be absent. */ | |
86 REG_ST, /* For x87 instructions: implicit %st. */ | |
87 JMP_TO /* Operand is jump target address: usually %rip+offset. */ | |
88 }; | |
89 | |
90 /* | |
91 * This enum extends NaClCPUFeatureID to cover instructions not recognized in | |
92 * | |
93 * / | |
94 enum DecoderCPUFeatures { | |
95 }; | |
96 */ | |
97 | |
98 enum disp_mode { | |
99 DISPNONE, | |
100 DISP8, | |
101 DISP16, | |
102 DISP32, | |
103 DISP64, | |
104 }; | |
105 | |
106 struct instruction { | |
107 const char *name; | |
108 unsigned char operands_count; | |
109 struct { | |
110 unsigned char rex; /* Mostly to distingush cases like %ah vs %spl. */ | |
111 #ifdef _MSC_VER | |
112 Bool data16:1; /* "Normal", non-rex prefixes. */ | |
113 Bool lock:1; | |
114 Bool repnz:1; | |
115 Bool repz:1; | |
116 Bool branch_not_taken:1; | |
117 Bool branch_taken:1; | |
118 #else | |
119 _Bool data16:1; /* "Normal", non-rex prefixes. */ | |
120 _Bool lock:1; | |
121 _Bool repnz:1; | |
122 _Bool repz:1; | |
123 _Bool branch_not_taken:1; | |
124 _Bool branch_taken:1; | |
125 #endif | |
126 } prefix; | |
127 struct { | |
128 enum register_name name; | |
129 enum operand_type type; | |
130 } operands[5]; | |
131 struct { | |
132 enum register_name base; | |
133 enum register_name index; | |
134 int scale; | |
135 int64_t offset; | |
136 enum disp_mode disp_type; | |
137 } rm; | |
138 uint64_t imm[2]; | |
139 }; | |
140 | |
141 typedef void (*process_instruction_func) (const uint8_t *begin, | |
142 const uint8_t *end, | |
143 struct instruction *instruction, | |
144 void *userdata); | |
145 | |
146 typedef void (*process_decoding_error_func) (const uint8_t *ptr, | |
147 void *userdata); | |
148 | |
149 /* All possible CPUID features enabled. */ | |
150 extern const NaClCPUFeaturesX86 full_cpuid_features; | |
151 | |
152 int DecodeChunkAMD64(const uint8_t *data, size_t size, | |
153 process_instruction_func process_instruction, | |
154 process_decoding_error_func process_error, void *userdata); | |
155 | |
156 int DecodeChunkIA32(const uint8_t *data, size_t size, | |
157 process_instruction_func process_instruction, | |
158 process_decoding_error_func process_error, void *userdata); | |
159 | |
160 EXTERN_C_END | |
161 | |
162 #endif /* NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODER_H_ */ | |
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