| OLD | NEW |
|---|
| (Empty) |
| 1 /* | |
| 2 * Copyright (c) 2011 The Native Client Authors. All rights reserved. | |
| 3 * Use of this source code is governed by a BSD-style license that can be | |
| 4 * found in the LICENSE file. | |
| 5 */ | |
| 6 | |
| 7 /* | |
| 8 * Full-blown decoder for amd64 case. Can be used to decode instruction | |
| 9 * sequence and process it, but right now is only used in tests. | |
| 10 * | |
| 11 * The code is in [hand-written] "parse_instruction.rl" and in [auto-generated] | |
| 12 * "decoder_x86_64_instruction.rl" file. This file only includes tiny amount | |
| 13 * of the glue code. | |
| 14 */ | |
| 15 | |
| 16 #include <assert.h> | |
| 17 #include <stddef.h> | |
| 18 #include <stdio.h> | |
| 19 #include <stdlib.h> | |
| 20 #include <string.h> | |
| 21 | |
| 22 #include "native_client/src/include/elf32.h" | |
| 23 #include "native_client/src/shared/utils/types.h" | |
| 24 #include "native_client/src/trusted/validator_ragel/unreviewed/decoder_internal.
h" | |
| 25 | |
| 26 /* | |
| 27 * These prefixes are only useful in AMD64 mode, but they will "cleaned up" by | |
| 28 * decoder's cleanup procedure in IA32 mode anyway. That's why we define them | |
| 29 * twice: "real" version here and "do-nothing" in decoder_x86_32.rl. | |
| 30 */ | |
| 31 #define SET_REX_PREFIX(P) instruction.prefix.rex = (P) | |
| 32 #define SET_VEX_PREFIX2(P) vex_prefix2 = (P) | |
| 33 #define CLEAR_SPURIOUS_REX_B() \ | |
| 34 instruction.prefix.rex_b_spurious = FALSE | |
| 35 #define SET_SPURIOUS_REX_B() \ | |
| 36 if (GET_REX_PREFIX() & REX_B) instruction.prefix.rex_b_spurious = TRUE | |
| 37 #define CLEAR_SPURIOUS_REX_X() \ | |
| 38 instruction.prefix.rex_x_spurious = FALSE | |
| 39 #define SET_SPURIOUS_REX_X() \ | |
| 40 if (GET_REX_PREFIX() & REX_X) instruction.prefix.rex_x_spurious = TRUE | |
| 41 #define CLEAR_SPURIOUS_REX_R() \ | |
| 42 instruction.prefix.rex_r_spurious = FALSE | |
| 43 #define SET_SPURIOUS_REX_R() \ | |
| 44 if (GET_REX_PREFIX() & REX_R) instruction.prefix.rex_r_spurious = TRUE | |
| 45 #define CLEAR_SPURIOUS_REX_W() \ | |
| 46 instruction.prefix.rex_w_spurious = FALSE | |
| 47 #define SET_SPURIOUS_REX_W() \ | |
| 48 if (GET_REX_PREFIX() & REX_W) instruction.prefix.rex_w_spurious = TRUE | |
| 49 | |
| 50 %%{ | |
| 51 machine x86_64_decoder; | |
| 52 alphtype unsigned char; | |
| 53 variable p current_position; | |
| 54 variable pe end_of_data; | |
| 55 variable eof end_of_data; | |
| 56 variable cs current_state; | |
| 57 | |
| 58 include byte_machine "byte_machines.rl"; | |
| 59 | |
| 60 include prefixes_parsing_decoder | |
| 61 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 62 include rex_actions | |
| 63 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 64 include rex_parsing | |
| 65 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 66 include vex_actions_amd64 | |
| 67 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 68 include vex_parsing_amd64 | |
| 69 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 70 include att_suffix_actions | |
| 71 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 72 include set_spurious_prefixes | |
| 73 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 74 include displacement_fields_parsing | |
| 75 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 76 include modrm_actions_amd64 | |
| 77 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 78 include modrm_parsing | |
| 79 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 80 include operand_format_actions | |
| 81 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 82 include operand_source_actions_amd64 | |
| 83 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 84 include immediate_fields_parsing | |
| 85 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 86 include relative_fields_decoder_actions | |
| 87 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 88 include relative_fields_parsing | |
| 89 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 90 include cpuid_actions | |
| 91 "native_client/src/trusted/validator_ragel/parse_instruction.rl"; | |
| 92 | |
| 93 include decode_x86_64 "decoder_x86_64_instruction.rl"; | |
| 94 | |
| 95 action end_of_instruction_cleanup { | |
| 96 process_instruction(instruction_begin, current_position + 1, &instruction, | |
| 97 userdata); | |
| 98 instruction_begin = current_position + 1; | |
| 99 SET_DISP_TYPE(DISPNONE); | |
| 100 SET_IMM_TYPE(IMMNONE); | |
| 101 SET_IMM2_TYPE(IMMNONE); | |
| 102 SET_REX_PREFIX(FALSE); | |
| 103 SET_DATA16_PREFIX(FALSE); | |
| 104 SET_LOCK_PREFIX(FALSE); | |
| 105 SET_REPNZ_PREFIX(FALSE); | |
| 106 SET_REPZ_PREFIX(FALSE); | |
| 107 SET_BRANCH_NOT_TAKEN(FALSE); | |
| 108 SET_BRANCH_TAKEN(FALSE); | |
| 109 /* | |
| 110 * Top three bits of VEX2 are inverted: see AMD/Intel manual. | |
| 111 * Pass VEX2 prefix value that corresponds to zero bits. | |
| 112 */ | |
| 113 SET_VEX_PREFIX2(VEX_R | VEX_X | VEX_B); | |
| 114 SET_VEX_PREFIX3(0x00); | |
| 115 SET_ATT_INSTRUCTION_SUFFIX(NULL); | |
| 116 CLEAR_SPURIOUS_REX_B(); | |
| 117 CLEAR_SPURIOUS_REX_X(); | |
| 118 CLEAR_SPURIOUS_REX_R(); | |
| 119 CLEAR_SPURIOUS_REX_W(); | |
| 120 } | |
| 121 | |
| 122 action report_fatal_error { | |
| 123 process_error(current_position, userdata); | |
| 124 result = FALSE; | |
| 125 goto error_detected; | |
| 126 } | |
| 127 | |
| 128 decoder := (one_instruction @end_of_instruction_cleanup)* | |
| 129 $!report_fatal_error; | |
| 130 }%% | |
| 131 | |
| 132 %% write data; | |
| 133 | |
| 134 int DecodeChunkAMD64(const uint8_t *data, size_t size, | |
| 135 ProcessInstructionFunc process_instruction, | |
| 136 ProcessDecodingErrorFunc process_error, | |
| 137 void *userdata) { | |
| 138 const uint8_t *current_position = data; | |
| 139 const uint8_t *end_of_data = data + size; | |
| 140 const uint8_t *instruction_begin = current_position; | |
| 141 /* | |
| 142 * Top three bits of VEX2 are inverted: see AMD/Intel manual. | |
| 143 * Start with VEX2 prefix value that corresponds to zero bits. | |
| 144 */ | |
| 145 uint8_t vex_prefix2 = VEX_R | VEX_X | VEX_B; | |
| 146 uint8_t vex_prefix3 = 0x00; | |
| 147 enum ImmediateMode imm_operand = IMMNONE; | |
| 148 enum ImmediateMode imm2_operand = IMMNONE; | |
| 149 struct Instruction instruction; | |
| 150 int result = TRUE; | |
| 151 | |
| 152 int current_state; | |
| 153 | |
| 154 memset(&instruction, 0, sizeof instruction); | |
| 155 | |
| 156 %% write init; | |
| 157 %% write exec; | |
| 158 | |
| 159 error_detected: | |
| 160 return result; | |
| 161 } | |
| OLD | NEW |
|---|
Chromium Code Reviews
Issue 11000033:
Move validator_x86_XX.rl out of unreviewed. (Closed)
Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/