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1 /* | |
2 * Copyright (c) 2012 The Native Client Authors. All rights reserved. | |
3 * Use of this source code is governed by a BSD-style license that can be | |
4 * found in the LICENSE file. | |
5 */ | |
6 | |
7 /* | |
8 * This file contains common parts of x86-32 and x86-64 internals (inline | |
9 * functions and defines). | |
10 */ | |
11 | |
12 #ifndef NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODER_INTERNAL_H_ | |
13 #define NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODER_INTERNAL_H_ | |
14 | |
15 #include "native_client/src/trusted/validator_ragel/unreviewed/decoding.h" | |
16 | |
17 /* | |
18 * Set of macroses used in actions defined in parse_instruction.rl to pull | |
19 * parts of the instruction from a byte stream and store them for future use. | |
20 */ | |
21 #define GET_REX_PREFIX() instruction.prefix.rex | |
22 #define GET_VEX_PREFIX2() vex_prefix2 | |
23 #define GET_VEX_PREFIX3() vex_prefix3 | |
24 #define SET_VEX_PREFIX3(P) vex_prefix3 = (P) | |
25 #define SET_DATA16_PREFIX(S) instruction.prefix.data16 = (S) | |
26 #define SET_LOCK_PREFIX(S) instruction.prefix.lock = (S) | |
27 #define SET_REPZ_PREFIX(S) instruction.prefix.repz = (S) | |
28 #define SET_REPNZ_PREFIX(S) instruction.prefix.repnz = (S) | |
29 #define SET_BRANCH_TAKEN(S) instruction.prefix.branch_taken = (S) | |
30 #define SET_BRANCH_NOT_TAKEN(S) instruction.prefix.branch_not_taken = (S) | |
31 #define SET_INSTRUCTION_NAME(N) instruction.name = (N) | |
32 #define GET_OPERAND_NAME(N) instruction.operands[(N)].name | |
33 #define SET_OPERAND_NAME(N, S) instruction.operands[(N)].name = (S) | |
34 #define SET_OPERAND_FORMAT(N, S) instruction.operands[(N)].format = (S) | |
35 #define SET_OPERANDS_COUNT(N) instruction.operands_count = (N) | |
36 #define SET_MODRM_BASE(N) instruction.rm.base = (N) | |
37 #define SET_MODRM_INDEX(N) instruction.rm.index = (N) | |
38 #define SET_MODRM_SCALE(S) instruction.rm.scale = (S) | |
39 #define SET_DISP_TYPE(T) instruction.rm.disp_type = (T) | |
40 #define SET_DISP_PTR(P) \ | |
41 instruction.rm.offset = DecodeDisplacementValue(instruction.rm.disp_type, (P)) | |
42 #define SET_IMM_TYPE(T) imm_operand = (T) | |
43 #define SET_IMM_PTR(P) \ | |
44 instruction.imm[0] = DecodeImmediateValue(imm_operand, (P)) | |
45 #define SET_IMM2_TYPE(T) imm2_operand = (T) | |
46 #define SET_IMM2_PTR(P) \ | |
47 instruction.imm[1] = DecodeImmediateValue(imm2_operand, (P)) | |
48 #define SET_CPU_FEATURE(F) | |
49 #define SET_ATT_INSTRUCTION_SUFFIX(S) instruction.att_instruction_suffix = (S) | |
50 | |
51 /* | |
52 * Immediate mode: size of the instruction's immediate operand. Note that there | |
53 * IMMNONE (which means there are no immediate operand) and IMM2 (which is | |
54 * two-bit immediate which shares it's byte with other operands). | |
55 */ | |
56 enum ImmediateMode { | |
57 IMMNONE, | |
58 IMM2, | |
59 IMM8, | |
60 IMM16, | |
61 IMM32, | |
62 IMM64 | |
63 }; | |
64 | |
65 static FORCEINLINE uint64_t DecodeDisplacementValue( | |
66 enum DisplacementMode disp_mode, const uint8_t *disp_ptr) { | |
67 switch(disp_mode) { | |
68 case DISPNONE: return 0; | |
69 case DISP8: return SignExtend8Bit(AnyFieldValue8bit(disp_ptr)); | |
70 case DISP16: return SignExtend16Bit(AnyFieldValue16bit(disp_ptr)); | |
71 case DISP32: return SignExtend32Bit(AnyFieldValue32bit(disp_ptr)); | |
72 case DISP64: return AnyFieldValue64bit(disp_ptr); | |
73 } | |
74 assert(FALSE); | |
75 return 0; | |
76 } | |
77 | |
78 | |
79 static FORCEINLINE uint64_t DecodeImmediateValue(enum ImmediateMode imm_mode, | |
80 const uint8_t *imm_ptr) { | |
81 switch(imm_mode) { | |
82 case IMMNONE: return 0; | |
83 case IMM2: return imm_ptr[0] & 0x03; | |
84 case IMM8: return AnyFieldValue8bit(imm_ptr); | |
85 case IMM16: return AnyFieldValue16bit(imm_ptr); | |
86 case IMM32: return AnyFieldValue32bit(imm_ptr); | |
87 case IMM64: return AnyFieldValue64bit(imm_ptr); | |
88 } | |
89 assert(FALSE); | |
90 return 0; | |
91 } | |
92 | |
93 #endif /* NATIVE_CLIENT_SRC_TRUSTED_VALIDATOR_RAGEL_DECODER_INTERNAL_H_ */ | |
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