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1 /* | 1 /* |
2 * Copyright (c) 2012 The Native Client Authors. All rights reserved. | 2 * Copyright (c) 2012 The Native Client Authors. All rights reserved. |
3 * Use of this source code is governed by a BSD-style license that can be | 3 * Use of this source code is governed by a BSD-style license that can be |
4 * found in the LICENSE file. | 4 * found in the LICENSE file. |
5 */ | 5 */ |
6 | 6 |
7 | 7 |
8 #ifndef NATIVE_CLIENT_SRC_INCLUDE_CONCURRENCY_OPS_H_ | 8 #ifndef NATIVE_CLIENT_SRC_INCLUDE_CONCURRENCY_OPS_H_ |
9 #define NATIVE_CLIENT_SRC_INCLUDE_CONCURRENCY_OPS_H_ 1 | 9 #define NATIVE_CLIENT_SRC_INCLUDE_CONCURRENCY_OPS_H_ 1 |
10 | 10 |
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29 /* Note that this depends on ARMv7. */ | 29 /* Note that this depends on ARMv7. */ |
30 __asm__ __volatile__("dsb"); | 30 __asm__ __volatile__("dsb"); |
31 | 31 |
32 /* | 32 /* |
33 * We could support ARMv6 by instead using: | 33 * We could support ARMv6 by instead using: |
34 * __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 5" | 34 * __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 5" |
35 * : : "r" (0) : "memory"); | 35 * : : "r" (0) : "memory"); |
36 */ | 36 */ |
37 } | 37 } |
38 | 38 |
| 39 #elif NACL_ARCH(NACL_BUILD_ARCH) == NACL_mips |
| 40 |
| 41 static INLINE void NaClWriteMemoryBarrier() { |
| 42 __asm__ __volatile__("sync" : : : "memory"); |
| 43 } |
| 44 |
39 #else | 45 #else |
40 | 46 |
41 #error "Define for other architectures" | 47 #error "Define for other architectures" |
42 | 48 |
43 #endif | 49 #endif |
44 | 50 |
45 | 51 |
46 static INLINE void NaClFlushCacheForDoublyMappedCode(uint8_t *writable_addr, | 52 static INLINE void NaClFlushCacheForDoublyMappedCode(uint8_t *writable_addr, |
47 uint8_t *executable_addr, | 53 uint8_t *executable_addr, |
48 size_t size) { | 54 size_t size) { |
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77 * Give an error in case we ever target a non-gcc compiler for ARM | 83 * Give an error in case we ever target a non-gcc compiler for ARM |
78 * or for some other architecture that we might support in the | 84 * or for some other architecture that we might support in the |
79 * future. | 85 * future. |
80 */ | 86 */ |
81 # error "Don't know how to clear the icache on this architecture" | 87 # error "Don't know how to clear the icache on this architecture" |
82 #endif | 88 #endif |
83 } | 89 } |
84 | 90 |
85 | 91 |
86 #endif /* NATIVE_CLIENT_SRC_INCLUDE_CONCURRENCY_OPS_H_ */ | 92 #endif /* NATIVE_CLIENT_SRC_INCLUDE_CONCURRENCY_OPS_H_ */ |
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