Rematerialize constants instead of spilling them.

runtime/vm/flow_graph_allocator.cc

 // Copyright (c) 2012, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/flow_graph_allocator.h"
 
 #include "vm/bit_vector.h"
 #include "vm/intermediate_language.h"
 #include "vm/il_printer.h"
 #include "vm/flow_graph.h"
@@ skipping 551 matching lines @@
     }
   }
 
   // Process global constants.
   BindInstr* null_defn = graph_entry->constant_null()->AsBind();
   LiveRange* range = GetLiveRange(null_defn->ssa_temp_index());
   range->AddUseInterval(graph_entry->start_pos(), graph_entry->end_pos());
   range->DefineAt(graph_entry->start_pos());
   range->set_assigned_location(
       Location::Constant(null_defn->computation()->AsConstant()->value()));
+  range->set_spill_slot(
+      Location::Constant(null_defn->computation()->AsConstant()->value()));
   range->finger()->Initialize(range);
   UsePosition* use =
       range->finger()->FirstRegisterBeneficialUse(graph_entry->start_pos());
   if (use != NULL) {
     LiveRange* tail = SplitBetween(range, graph_entry->start_pos(), use->pos());
     CompleteRange(tail, Location::kRegister);
   }
   ConvertAllUses(range);
 }
 
@@ skipping 1346 matching lines @@
 
   // All allocation decisions were done.
   ASSERT(unallocated_.is_empty());
 
   // Finish allocation.
   AdvanceActiveIntervals(kMaxPosition);
   TRACE_ALLOC(OS::Print("Allocation completed\n"));
 }
 
 
+bool FlowGraphAllocator::TargetLocationIsSpillSlot(LiveRange* range,
+                                                   Location target) {
+  if (target.IsStackSlot() ||
+      target.IsDoubleStackSlot() ||
+      target.IsConstant()) {
+    ASSERT(GetLiveRange(range->vreg())->spill_slot().Equals(target));
+    return true;
+  }
+  return false;
+}
+
+
 void FlowGraphAllocator::ConnectSplitSiblings(LiveRange* parent,
                                               BlockEntryInstr* source_block,
                                               BlockEntryInstr* target_block) {
   TRACE_ALLOC(OS::Print("Connect source_block=%d, target_block=%d\n",
                         source_block->block_id(),
                         target_block->block_id()));
   if (parent->next_sibling() == NULL) {
     // Nothing to connect. The whole range was allocated to the same location.
     TRACE_ALLOC(OS::Print("range %d has no siblings\n", parent->vreg()));
     return;
@@ skipping 37 matching lines @@
   TRACE_ALLOC(source.Print());
   TRACE_ALLOC(OS::Print("] to [%d, %d) [",
                         target_cover->Start(), target_cover->End()));
   TRACE_ALLOC(target.Print());
   TRACE_ALLOC(OS::Print("]\n"));
 
   // Siblings were allocated to the same register.
   if (source.Equals(target)) return;
 
   // Values are eagerly spilled. Spill slot already contains appropriate value.
-  if (target.IsStackSlot() || target.IsDoubleStackSlot()) {
-    ASSERT(parent->spill_slot().Equals(target));
+  if (TargetLocationIsSpillSlot(parent, target)) {
     return;
   }
 
   Instruction* last = source_block->last_instruction();
   if ((last->SuccessorCount() == 1) && !source_block->IsGraphEntry()) {
     ASSERT(last->IsGoto());
     last->AsGoto()->GetParallelMove()->AddMove(target, source);
   } else {
     target_block->GetParallelMove()->AddMove(target, source);
   }
@@ skipping 10 matching lines @@
     while (range->next_sibling() != NULL) {
       LiveRange* sibling = range->next_sibling();
       TRACE_ALLOC(OS::Print("connecting [%d, %d) [",
                             range->Start(), range->End()));
       TRACE_ALLOC(range->assigned_location().Print());
       TRACE_ALLOC(OS::Print("] to [%d, %d) [",
                             sibling->Start(), sibling->End()));
       TRACE_ALLOC(sibling->assigned_location().Print());
       TRACE_ALLOC(OS::Print("]\n"));
       if ((range->End() == sibling->Start()) &&
-          !sibling->assigned_location().IsStackSlot() &&
-          !sibling->assigned_location().IsDoubleStackSlot() &&
+          !TargetLocationIsSpillSlot(range, sibling->assigned_location()) &&
           !range->assigned_location().Equals(sibling->assigned_location()) &&
           !IsBlockEntry(range->End())) {
         AddMoveAt(sibling->Start(),
                   sibling->assigned_location(),
                   range->assigned_location());
       }
       range = sibling;
     }
   }
 
   // Resolve non-linear control flow across branches.
   for (intptr_t i = 1; i < block_order_.length(); i++) {
     BlockEntryInstr* block = block_order_[i];
     BitVector* live = live_in_[block->postorder_number()];
     for (BitVector::Iterator it(live); !it.Done(); it.Advance()) {
       LiveRange* range = GetLiveRange(it.Current());
       for (intptr_t j = 0; j < block->PredecessorCount(); j++) {
         ConnectSplitSiblings(range, block->PredecessorAt(j), block);
       }
     }
   }
 
   // Eagerly spill values.
   // TODO(vegorov): if value is spilled on the cold path (e.g. by the call)
   // this will cause spilling to occur on the fast path (at the definition).
   for (intptr_t i = 0; i < spilled_.length(); i++) {
     LiveRange* range = spilled_[i];
     if (range->assigned_location().IsStackSlot() ||
-        range->assigned_location().IsDoubleStackSlot()) {
+        range->assigned_location().IsDoubleStackSlot() ||
+        range->assigned_location().IsConstant()) {
       ASSERT(range->assigned_location().Equals(range->spill_slot()));
     } else {
       AddMoveAt(range->Start() + 1,
                 range->spill_slot(),
                 range->assigned_location());
     }
   }
 }
 
 
@@ skipping 63 matching lines @@
     OS::Print("-- [after ssa allocator] ir [%s] -------------\n",
               function.ToFullyQualifiedCString());
     FlowGraphPrinter printer(flow_graph_, true);
     printer.PrintBlocks();
     OS::Print("----------------------------------------------\n");
   }
 }
 
 
 }  // namespace dart