Merge https://github.com/yasm/yasm/commit/9728322335cba96500861ef766b1546d096e5600

modules/arch/x86/x86id.c

 /*
  * x86 identifier recognition and instruction handling
  *
  *  Copyright (C) 2002-2007  Peter Johnson
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
@@ skipping 590 matching lines @@
      * First match wins.
      */
     for (; num_info>0 && !found; num_info--, info++) {
         yasm_insn_operand *op, **use_ops;
         const x86_info_operand *info_ops =
             &insn_operands[info->operands_index];
         unsigned int gas_flags = info->gas_flags;
         unsigned int misc_flags = info->misc_flags;
         unsigned int size;
         int mismatch = 0;
-        int i;
+        unsigned int i;
 
         /* Match CPU */
         if (mode_bits != 64 && (misc_flags & ONLY_64))
             continue;
         if (mode_bits == 64 && (misc_flags & NOT_64))
             continue;
 
         if (bypass != 8 &&
             (!BitVector_bit_test(id_insn->cpu_enabled, info->cpu0) ||
              !BitVector_bit_test(id_insn->cpu_enabled, info->cpu1) ||
@@ skipping 1266 matching lines @@
     id_insn->mode_bits = arch_x86->mode_bits;
     id_insn->suffix = (PARSER(arch_x86) == X86_PARSER_GAS) ? SUF_Z : 0;
     id_insn->misc_flags = 0;
     id_insn->parser = PARSER(arch_x86);
     id_insn->force_strict = arch_x86->force_strict != 0;
     id_insn->default_rel = arch_x86->default_rel != 0;
 
     return yasm_bc_create_common(&x86_id_insn_callback, id_insn, line);
 }