ARM validator: continue with extra_load_store_instructions.

src/trusted/validator_arm/gen/arm32_decode_tests.cc

 /*
  * Copyright 2012 The Native Client Authors.  All rights reserved.
  * Use of this source code is governed by a BSD-style license that can
  * be found in the LICENSE file.
  */
 
 // DO NOT EDIT: GENERATED CODE
 
 #ifndef NACL_TRUSTED_BUT_NOT_TCB
 #error This file is not meant for use in the TCB
@@ skipping 3174 matching lines @@
 
   // Check that row patterns apply to pattern being checked.'
   if ((inst.Bits() & 0x01E00000) != 0x01E00000 /* op1(24:20) == ~1111x */) return false;
   if ((inst.Bits() & 0x00000060) != 0x00000040 /* op2(7:5) == ~x10 */) return false;
 
   // Check other preconditions defined for the base decoder.
   return Binary2RegisterBitRangeNotRnIsPcTester::
       PassesParsePreconditions(inst, decoder);
 }
 
-class Unary1RegisterSetTesterop2_6To4Is000_op_22To21Isx0
+class Unary1RegisterSetTesterop2_6To4Is000_B_9Is0_op_22To21Isx0
     : public Unary1RegisterSetTester {
  public:
-  Unary1RegisterSetTesterop2_6To4Is000_op_22To21Isx0(const NamedClassDecoder& decoder)
+  Unary1RegisterSetTesterop2_6To4Is000_B_9Is0_op_22To21Isx0(const NamedClassDecoder& decoder)
     : Unary1RegisterSetTester(decoder) {}
   virtual bool PassesParsePreconditions(
       nacl_arm_dec::Instruction inst,
       const NamedClassDecoder& decoder);
 
 };
 
-bool Unary1RegisterSetTesterop2_6To4Is000_op_22To21Isx0
+bool Unary1RegisterSetTesterop2_6To4Is000_B_9Is0_op_22To21Isx0
 ::PassesParsePreconditions(
      nacl_arm_dec::Instruction inst,
      const NamedClassDecoder& decoder) {
 
   // Check that row patterns apply to pattern being checked.'
   if ((inst.Bits() & 0x00000070) != 0x00000000 /* op2(6:4) == ~000 */) return false;
+  if ((inst.Bits() & 0x00000200) != 0x00000000 /* B(9:9) == ~0 */) return false;
   if ((inst.Bits() & 0x00200000) != 0x00000000 /* op(22:21) == ~x0 */) return false;
 
   // Check other preconditions defined for the base decoder.
   return Unary1RegisterSetTester::
       PassesParsePreconditions(inst, decoder);
 }
 
-class Unary1RegisterUseTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx00
+class Unary1RegisterUseTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx00
     : public Unary1RegisterUseTester {
  public:
-  Unary1RegisterUseTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx00(const NamedClassDecoder& decoder)
+  Unary1RegisterUseTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx00(const NamedClassDecoder& decoder)
     : Unary1RegisterUseTester(decoder) {}
   virtual bool PassesParsePreconditions(
       nacl_arm_dec::Instruction inst,
       const NamedClassDecoder& decoder);
 
 };
 
-bool Unary1RegisterUseTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx00
+bool Unary1RegisterUseTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx00
 ::PassesParsePreconditions(
      nacl_arm_dec::Instruction inst,
      const NamedClassDecoder& decoder) {
 
   // Check that row patterns apply to pattern being checked.'
   if ((inst.Bits() & 0x00000070) != 0x00000000 /* op2(6:4) == ~000 */) return false;
+  if ((inst.Bits() & 0x00000200) != 0x00000000 /* B(9:9) == ~0 */) return false;
   if ((inst.Bits() & 0x00600000) != 0x00200000 /* op(22:21) == ~01 */) return false;
   if ((inst.Bits() & 0x00030000) != 0x00000000 /* op1(19:16) == ~xx00 */) return false;
 
   // Check other preconditions defined for the base decoder.
   return Unary1RegisterUseTester::
       PassesParsePreconditions(inst, decoder);
 }
 
-class UnsafeCondNopTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx01
+class UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx01
     : public UnsafeCondNopTester {
  public:
-  UnsafeCondNopTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx01(const NamedClassDecoder& decoder)
+  UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx01(const NamedClassDecoder& decoder)
     : UnsafeCondNopTester(decoder) {}
   virtual bool PassesParsePreconditions(
       nacl_arm_dec::Instruction inst,
       const NamedClassDecoder& decoder);
 
 };
 
-bool UnsafeCondNopTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx01
+bool UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx01
 ::PassesParsePreconditions(
      nacl_arm_dec::Instruction inst,
      const NamedClassDecoder& decoder) {
 
   // Check that row patterns apply to pattern being checked.'
   if ((inst.Bits() & 0x00000070) != 0x00000000 /* op2(6:4) == ~000 */) return false;
+  if ((inst.Bits() & 0x00000200) != 0x00000000 /* B(9:9) == ~0 */) return false;
   if ((inst.Bits() & 0x00600000) != 0x00200000 /* op(22:21) == ~01 */) return false;
   if ((inst.Bits() & 0x00030000) != 0x00010000 /* op1(19:16) == ~xx01 */) return false;
 
   // Check other preconditions defined for the base decoder.
   return UnsafeCondNopTester::
       PassesParsePreconditions(inst, decoder);
 }
 
-class UnsafeCondNopTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx1x
+class UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx1x
     : public UnsafeCondNopTester {
  public:
-  UnsafeCondNopTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx1x(const NamedClassDecoder& decoder)
+  UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx1x(const NamedClassDecoder& decoder)
     : UnsafeCondNopTester(decoder) {}
   virtual bool PassesParsePreconditions(
       nacl_arm_dec::Instruction inst,
       const NamedClassDecoder& decoder);
 
 };
 
-bool UnsafeCondNopTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx1x
+bool UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx1x
 ::PassesParsePreconditions(
      nacl_arm_dec::Instruction inst,
      const NamedClassDecoder& decoder) {
 
   // Check that row patterns apply to pattern being checked.'
   if ((inst.Bits() & 0x00000070) != 0x00000000 /* op2(6:4) == ~000 */) return false;
+  if ((inst.Bits() & 0x00000200) != 0x00000000 /* B(9:9) == ~0 */) return false;
   if ((inst.Bits() & 0x00600000) != 0x00200000 /* op(22:21) == ~01 */) return false;
   if ((inst.Bits() & 0x00020000) != 0x00020000 /* op1(19:16) == ~xx1x */) return false;
 
   // Check other preconditions defined for the base decoder.
   return UnsafeCondNopTester::
       PassesParsePreconditions(inst, decoder);
 }
 
-class UnsafeCondNopTesterop2_6To4Is000_op_22To21Is11
+class UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is11
     : public UnsafeCondNopTester {
  public:
-  UnsafeCondNopTesterop2_6To4Is000_op_22To21Is11(const NamedClassDecoder& decoder)
+  UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is11(const NamedClassDecoder& decoder)
     : UnsafeCondNopTester(decoder) {}
   virtual bool PassesParsePreconditions(
       nacl_arm_dec::Instruction inst,
       const NamedClassDecoder& decoder);
 
 };
 
-bool UnsafeCondNopTesterop2_6To4Is000_op_22To21Is11
+bool UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is11
 ::PassesParsePreconditions(
      nacl_arm_dec::Instruction inst,
      const NamedClassDecoder& decoder) {
 
   // Check that row patterns apply to pattern being checked.'
   if ((inst.Bits() & 0x00000070) != 0x00000000 /* op2(6:4) == ~000 */) return false;
+  if ((inst.Bits() & 0x00000200) != 0x00000000 /* B(9:9) == ~0 */) return false;
   if ((inst.Bits() & 0x00600000) != 0x00600000 /* op(22:21) == ~11 */) return false;
 
   // Check other preconditions defined for the base decoder.
   return UnsafeCondNopTester::
       PassesParsePreconditions(inst, decoder);
 }
 
 class BranchToRegisterTesterop2_6To4Is001_op_22To21Is01
     : public BranchToRegisterTester {
  public:
@@ skipping 293 matching lines @@
   // Check that row patterns apply to pattern being checked.'
   if ((inst.Bits() & 0x00400000) != 0x00000000 /* op(22:22) == ~0 */) return false;
   if ((inst.Bits() & 0x000F0000) != 0x00000000 /* op1(19:16) == ~0000 */) return false;
   if ((inst.Bits() & 0x000000F0) != 0x000000F0 /* op2(7:0) == ~1111xxxx */) return false;
 
   // Check other preconditions defined for the base decoder.
   return CondNopTester::
       PassesParsePreconditions(inst, decoder);
 }
 
+class MoveImmediate12ToApsrTesterop_22Is0_op1_19To16Is0100
+    : public MoveImmediate12ToApsrTester {
+ public:
+  MoveImmediate12ToApsrTesterop_22Is0_op1_19To16Is0100(const NamedClassDecoder& decoder)
+    : MoveImmediate12ToApsrTester(decoder) {}
+  virtual bool PassesParsePreconditions(
+      nacl_arm_dec::Instruction inst,
+      const NamedClassDecoder& decoder);
+
+};
+
+bool MoveImmediate12ToApsrTesterop_22Is0_op1_19To16Is0100
+::PassesParsePreconditions(
+     nacl_arm_dec::Instruction inst,
+     const NamedClassDecoder& decoder) {
+
+  // Check that row patterns apply to pattern being checked.'
+  if ((inst.Bits() & 0x00400000) != 0x00000000 /* op(22:22) == ~0 */) return false;
+  if ((inst.Bits() & 0x000F0000) != 0x00040000 /* op1(19:16) == ~0100 */) return false;
+
+  // Check other preconditions defined for the base decoder.
+  return MoveImmediate12ToApsrTester::
+      PassesParsePreconditions(inst, decoder);
+}
+
+class MoveImmediate12ToApsrTesterop_22Is0_op1_19To16Is1x00
+    : public MoveImmediate12ToApsrTester {
+ public:
+  MoveImmediate12ToApsrTesterop_22Is0_op1_19To16Is1x00(const NamedClassDecoder& decoder)
+    : MoveImmediate12ToApsrTester(decoder) {}
+  virtual bool PassesParsePreconditions(
+      nacl_arm_dec::Instruction inst,
+      const NamedClassDecoder& decoder);
+
+};
+
+bool MoveImmediate12ToApsrTesterop_22Is0_op1_19To16Is1x00
+::PassesParsePreconditions(
+     nacl_arm_dec::Instruction inst,
+     const NamedClassDecoder& decoder) {
+
+  // Check that row patterns apply to pattern being checked.'
+  if ((inst.Bits() & 0x00400000) != 0x00000000 /* op(22:22) == ~0 */) return false;
+  if ((inst.Bits() & 0x000B0000) != 0x00080000 /* op1(19:16) == ~1x00 */) return false;
+
+  // Check other preconditions defined for the base decoder.
+  return MoveImmediate12ToApsrTester::
+      PassesParsePreconditions(inst, decoder);
+}
+
 class UnsafeCondNopTesterop_22Is0_op1_19To16Isxx01
     : public UnsafeCondNopTester {
  public:
   UnsafeCondNopTesterop_22Is0_op1_19To16Isxx01(const NamedClassDecoder& decoder)
     : UnsafeCondNopTester(decoder) {}
   virtual bool PassesParsePreconditions(
       nacl_arm_dec::Instruction inst,
       const NamedClassDecoder& decoder);
 
 };
@@ skipping 3439 matching lines @@
 
 class Binary2RegisterBitRangeNotRnIsPcTester_op1_24To20Is1111x_op2_7To5Isx10_Ubfx_Rule_236_A1_P466
     : public Binary2RegisterBitRangeNotRnIsPcTesterop1_24To20Is1111x_op2_7To5Isx10 {
  public:
   Binary2RegisterBitRangeNotRnIsPcTester_op1_24To20Is1111x_op2_7To5Isx10_Ubfx_Rule_236_A1_P466()
     : Binary2RegisterBitRangeNotRnIsPcTesterop1_24To20Is1111x_op2_7To5Isx10(
       state_.Binary2RegisterBitRangeNotRnIsPc_Ubfx_Rule_236_A1_P466_instance_)
   {}
 };
 
-class Unary1RegisterSetTester_op2_6To4Is000_op_22To21Isx0_Mrs_Rule_102_A1_P206_Or_B6_10
-    : public Unary1RegisterSetTesterop2_6To4Is000_op_22To21Isx0 {
+class Unary1RegisterSetTester_op2_6To4Is000_B_9Is0_op_22To21Isx0_Mrs_Rule_102_A1_P206_Or_B6_10
+    : public Unary1RegisterSetTesterop2_6To4Is000_B_9Is0_op_22To21Isx0 {
  public:
-  Unary1RegisterSetTester_op2_6To4Is000_op_22To21Isx0_Mrs_Rule_102_A1_P206_Or_B6_10()
-    : Unary1RegisterSetTesterop2_6To4Is000_op_22To21Isx0(
+  Unary1RegisterSetTester_op2_6To4Is000_B_9Is0_op_22To21Isx0_Mrs_Rule_102_A1_P206_Or_B6_10()
+    : Unary1RegisterSetTesterop2_6To4Is000_B_9Is0_op_22To21Isx0(
       state_.Unary1RegisterSet_Mrs_Rule_102_A1_P206_Or_B6_10_instance_)
   {}
 };
 
-class Unary1RegisterUseTester_op2_6To4Is000_op_22To21Is01_op1_19To16Isxx00_Msr_Rule_104_A1_P210
-    : public Unary1RegisterUseTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx00 {
+class Unary1RegisterUseTester_op2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx00_Msr_Rule_104_A1_P210
+    : public Unary1RegisterUseTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx00 {
  public:
-  Unary1RegisterUseTester_op2_6To4Is000_op_22To21Is01_op1_19To16Isxx00_Msr_Rule_104_A1_P210()
-    : Unary1RegisterUseTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx00(
+  Unary1RegisterUseTester_op2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx00_Msr_Rule_104_A1_P210()
+    : Unary1RegisterUseTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx00(
       state_.Unary1RegisterUse_Msr_Rule_104_A1_P210_instance_)
   {}
 };
 
-class ForbiddenCondNopTester_op2_6To4Is000_op_22To21Is01_op1_19To16Isxx01_Msr_Rule_B6_1_7_P14
-    : public UnsafeCondNopTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx01 {
+class ForbiddenCondNopTester_op2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx01_Msr_Rule_B6_1_7_P14
+    : public UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx01 {
  public:
-  ForbiddenCondNopTester_op2_6To4Is000_op_22To21Is01_op1_19To16Isxx01_Msr_Rule_B6_1_7_P14()
-    : UnsafeCondNopTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx01(
+  ForbiddenCondNopTester_op2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx01_Msr_Rule_B6_1_7_P14()
+    : UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx01(
       state_.ForbiddenCondNop_Msr_Rule_B6_1_7_P14_instance_)
   {}
 };
 
-class ForbiddenCondNopTester_op2_6To4Is000_op_22To21Is01_op1_19To16Isxx1x_Msr_Rule_B6_1_7_P14
-    : public UnsafeCondNopTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx1x {
+class ForbiddenCondNopTester_op2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx1x_Msr_Rule_B6_1_7_P14
+    : public UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx1x {
  public:
-  ForbiddenCondNopTester_op2_6To4Is000_op_22To21Is01_op1_19To16Isxx1x_Msr_Rule_B6_1_7_P14()
-    : UnsafeCondNopTesterop2_6To4Is000_op_22To21Is01_op1_19To16Isxx1x(
+  ForbiddenCondNopTester_op2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx1x_Msr_Rule_B6_1_7_P14()
+    : UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx1x(
       state_.ForbiddenCondNop_Msr_Rule_B6_1_7_P14_instance_)
   {}
 };
 
-class ForbiddenCondNopTester_op2_6To4Is000_op_22To21Is11_Msr_Rule_B6_1_7_P14
-    : public UnsafeCondNopTesterop2_6To4Is000_op_22To21Is11 {
+class ForbiddenCondNopTester_op2_6To4Is000_B_9Is0_op_22To21Is11_Msr_Rule_B6_1_7_P14
+    : public UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is11 {
  public:
-  ForbiddenCondNopTester_op2_6To4Is000_op_22To21Is11_Msr_Rule_B6_1_7_P14()
-    : UnsafeCondNopTesterop2_6To4Is000_op_22To21Is11(
+  ForbiddenCondNopTester_op2_6To4Is000_B_9Is0_op_22To21Is11_Msr_Rule_B6_1_7_P14()
+    : UnsafeCondNopTesterop2_6To4Is000_B_9Is0_op_22To21Is11(
       state_.ForbiddenCondNop_Msr_Rule_B6_1_7_P14_instance_)
   {}
 };
 
 class BranchToRegisterTester_op2_6To4Is001_op_22To21Is01_Bx_Rule_25_A1_P62
     : public BranchToRegisterTesterop2_6To4Is001_op_22To21Is01 {
  public:
   BranchToRegisterTester_op2_6To4Is001_op_22To21Is01_Bx_Rule_25_A1_P62()
     : BranchToRegisterTesterop2_6To4Is001_op_22To21Is01(
       state_.BranchToRegister_Bx_Rule_25_A1_P62_instance_)
@@ skipping 92 matching lines @@
 
 class CondNopTester_op_22Is0_op1_19To16Is0000_op2_7To0Is1111xxxx_Dbg_Rule_40_A1_P88
     : public CondNopTesterop_22Is0_op1_19To16Is0000_op2_7To0Is1111xxxx {
  public:
   CondNopTester_op_22Is0_op1_19To16Is0000_op2_7To0Is1111xxxx_Dbg_Rule_40_A1_P88()
     : CondNopTesterop_22Is0_op1_19To16Is0000_op2_7To0Is1111xxxx(
       state_.CondNop_Dbg_Rule_40_A1_P88_instance_)
   {}
 };
 
+class MoveImmediate12ToApsrTester_op_22Is0_op1_19To16Is0100_Msr_Rule_103_A1_P208
+    : public MoveImmediate12ToApsrTesterop_22Is0_op1_19To16Is0100 {
+ public:
+  MoveImmediate12ToApsrTester_op_22Is0_op1_19To16Is0100_Msr_Rule_103_A1_P208()
+    : MoveImmediate12ToApsrTesterop_22Is0_op1_19To16Is0100(
+      state_.MoveImmediate12ToApsr_Msr_Rule_103_A1_P208_instance_)
+  {}
+};
+
+class MoveImmediate12ToApsrTester_op_22Is0_op1_19To16Is1x00_Msr_Rule_103_A1_P208
+    : public MoveImmediate12ToApsrTesterop_22Is0_op1_19To16Is1x00 {
+ public:
+  MoveImmediate12ToApsrTester_op_22Is0_op1_19To16Is1x00_Msr_Rule_103_A1_P208()
+    : MoveImmediate12ToApsrTesterop_22Is0_op1_19To16Is1x00(
+      state_.MoveImmediate12ToApsr_Msr_Rule_103_A1_P208_instance_)
+  {}
+};
+
 class ForbiddenCondNopTester_op_22Is0_op1_19To16Isxx01_Msr_Rule_B6_1_6_A1_PB6_12
     : public UnsafeCondNopTesterop_22Is0_op1_19To16Isxx01 {
  public:
   ForbiddenCondNopTester_op_22Is0_op1_19To16Isxx01_Msr_Rule_B6_1_6_A1_PB6_12()
     : UnsafeCondNopTesterop_22Is0_op1_19To16Isxx01(
       state_.ForbiddenCondNop_Msr_Rule_B6_1_6_A1_PB6_12_instance_)
   {}
 };
 
 class ForbiddenCondNopTester_op_22Is0_op1_19To16Isxx1x_Msr_Rule_B6_1_6_A1_PB6_12
@@ skipping 1810 matching lines @@
 
 TEST_F(Arm32DecoderStateTests,
        Binary2RegisterBitRangeNotRnIsPcTester_op1_24To20Is1111x_op2_7To5Isx10_Ubfx_Rule_236_A1_P466_cccc0111111mmmmmddddlllll101nnnn_Test) {
   Binary2RegisterBitRangeNotRnIsPcTester_op1_24To20Is1111x_op2_7To5Isx10_Ubfx_Rule_236_A1_P466 baseline_tester;
   NamedDefs12To15CondsDontCareRdRnNotPc_Ubfx_Rule_236_A1_P466 actual;
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
   a_vs_b_tester.Test("cccc0111111mmmmmddddlllll101nnnn");
 }
 
 TEST_F(Arm32DecoderStateTests,
-       Unary1RegisterSetTester_op2_6To4Is000_op_22To21Isx0_Mrs_Rule_102_A1_P206_Or_B6_10_cccc00010r001111dddd000000000000_Test) {
-  Unary1RegisterSetTester_op2_6To4Is000_op_22To21Isx0_Mrs_Rule_102_A1_P206_Or_B6_10 tester;
+       Unary1RegisterSetTester_op2_6To4Is000_B_9Is0_op_22To21Isx0_Mrs_Rule_102_A1_P206_Or_B6_10_cccc00010r001111dddd000000000000_Test) {
+  Unary1RegisterSetTester_op2_6To4Is000_B_9Is0_op_22To21Isx0_Mrs_Rule_102_A1_P206_Or_B6_10 tester;
   tester.Test("cccc00010r001111dddd000000000000");
 }
 
 TEST_F(Arm32DecoderStateTests,
-       Unary1RegisterUseTester_op2_6To4Is000_op_22To21Is01_op1_19To16Isxx00_Msr_Rule_104_A1_P210_cccc00010010mm00111100000000nnnn_Test) {
-  Unary1RegisterUseTester_op2_6To4Is000_op_22To21Is01_op1_19To16Isxx00_Msr_Rule_104_A1_P210 tester;
+       Unary1RegisterUseTester_op2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx00_Msr_Rule_104_A1_P210_cccc00010010mm00111100000000nnnn_Test) {
+  Unary1RegisterUseTester_op2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx00_Msr_Rule_104_A1_P210 tester;
   tester.Test("cccc00010010mm00111100000000nnnn");
 }
 
 TEST_F(Arm32DecoderStateTests,
-       ForbiddenCondNopTester_op2_6To4Is000_op_22To21Is01_op1_19To16Isxx01_Msr_Rule_B6_1_7_P14_cccc00010010mm01111100000000nnnn_Test) {
-  ForbiddenCondNopTester_op2_6To4Is000_op_22To21Is01_op1_19To16Isxx01_Msr_Rule_B6_1_7_P14 baseline_tester;
+       ForbiddenCondNopTester_op2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx01_Msr_Rule_B6_1_7_P14_cccc00010010mm01111100000000nnnn_Test) {
+  ForbiddenCondNopTester_op2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx01_Msr_Rule_B6_1_7_P14 baseline_tester;
   NamedForbidden_Msr_Rule_B6_1_7_P14 actual;
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
   a_vs_b_tester.Test("cccc00010010mm01111100000000nnnn");
 }
 
 TEST_F(Arm32DecoderStateTests,
-       ForbiddenCondNopTester_op2_6To4Is000_op_22To21Is01_op1_19To16Isxx1x_Msr_Rule_B6_1_7_P14_cccc00010010mm1m111100000000nnnn_Test) {
-  ForbiddenCondNopTester_op2_6To4Is000_op_22To21Is01_op1_19To16Isxx1x_Msr_Rule_B6_1_7_P14 baseline_tester;
+       ForbiddenCondNopTester_op2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx1x_Msr_Rule_B6_1_7_P14_cccc00010010mm1m111100000000nnnn_Test) {
+  ForbiddenCondNopTester_op2_6To4Is000_B_9Is0_op_22To21Is01_op1_19To16Isxx1x_Msr_Rule_B6_1_7_P14 baseline_tester;
   NamedForbidden_Msr_Rule_B6_1_7_P14 actual;
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
   a_vs_b_tester.Test("cccc00010010mm1m111100000000nnnn");
 }
 
 TEST_F(Arm32DecoderStateTests,
-       ForbiddenCondNopTester_op2_6To4Is000_op_22To21Is11_Msr_Rule_B6_1_7_P14_cccc00010110mmmm111100000000nnnn_Test) {
-  ForbiddenCondNopTester_op2_6To4Is000_op_22To21Is11_Msr_Rule_B6_1_7_P14 baseline_tester;
+       ForbiddenCondNopTester_op2_6To4Is000_B_9Is0_op_22To21Is11_Msr_Rule_B6_1_7_P14_cccc00010110mmmm111100000000nnnn_Test) {
+  ForbiddenCondNopTester_op2_6To4Is000_B_9Is0_op_22To21Is11_Msr_Rule_B6_1_7_P14 baseline_tester;
   NamedForbidden_Msr_Rule_B6_1_7_P14 actual;
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
   a_vs_b_tester.Test("cccc00010110mmmm111100000000nnnn");
 }
 
 TEST_F(Arm32DecoderStateTests,
        BranchToRegisterTester_op2_6To4Is001_op_22To21Is01_Bx_Rule_25_A1_P62_cccc000100101111111111110001mmmm_Test) {
   BranchToRegisterTester_op2_6To4Is001_op_22To21Is01_Bx_Rule_25_A1_P62 baseline_tester;
   NamedBxBlx_Bx_Rule_25_A1_P62 actual;
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
@@ skipping 26 matching lines @@
 
 TEST_F(Arm32DecoderStateTests,
        BreakPointAndConstantPoolHeadTester_op2_6To4Is111_op_22To21Is01_Bkpt_Rule_22_A1_P56_cccc00010010iiiiiiiiiiii0111iiii_Test) {
   BreakPointAndConstantPoolHeadTester_op2_6To4Is111_op_22To21Is01_Bkpt_Rule_22_A1_P56 baseline_tester;
   NamedBreakpoint_Bkpt_Rule_22_A1_P56 actual;
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
   a_vs_b_tester.Test("cccc00010010iiiiiiiiiiii0111iiii");
 }
 
 TEST_F(Arm32DecoderStateTests,
-       ForbiddenCondNopTester_op2_6To4Is111_op_22To21Is11_Smc_Rule_B6_1_9_P18_cccc000101100000000000000111mmmm_Test) {
+       ForbiddenCondNopTester_op2_6To4Is111_op_22To21Is11_Smc_Rule_B6_1_9_P18_cccc000101100000000000000111iiii_Test) {
   ForbiddenCondNopTester_op2_6To4Is111_op_22To21Is11_Smc_Rule_B6_1_9_P18 baseline_tester;
   NamedForbidden_Smc_Rule_B6_1_9_P18 actual;
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
-  a_vs_b_tester.Test("cccc000101100000000000000111mmmm");
+  a_vs_b_tester.Test("cccc000101100000000000000111iiii");
 }
 
 TEST_F(Arm32DecoderStateTests,
        CondNopTester_op_22Is0_op1_19To16Is0000_op2_7To0Is00000000_Nop_Rule_110_A1_P222_cccc0011001000001111000000000000_Test) {
   CondNopTester_op_22Is0_op1_19To16Is0000_op2_7To0Is00000000_Nop_Rule_110_A1_P222 baseline_tester;
   NamedDontCareInst_Nop_Rule_110_A1_P222 actual;
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
   a_vs_b_tester.Test("cccc0011001000001111000000000000");
 }
 
@@ skipping 31 matching lines @@
 
 TEST_F(Arm32DecoderStateTests,
        CondNopTester_op_22Is0_op1_19To16Is0000_op2_7To0Is1111xxxx_Dbg_Rule_40_A1_P88_cccc001100100000111100001111iiii_Test) {
   CondNopTester_op_22Is0_op1_19To16Is0000_op2_7To0Is1111xxxx_Dbg_Rule_40_A1_P88 baseline_tester;
   NamedDontCareInst_Dbg_Rule_40_A1_P88 actual;
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
   a_vs_b_tester.Test("cccc001100100000111100001111iiii");
 }
 
 TEST_F(Arm32DecoderStateTests,
+       MoveImmediate12ToApsrTester_op_22Is0_op1_19To16Is0100_Msr_Rule_103_A1_P208_cccc0011001001001111iiiiiiiiiiii_Test) {
+  MoveImmediate12ToApsrTester_op_22Is0_op1_19To16Is0100_Msr_Rule_103_A1_P208 baseline_tester;
+  NamedDontCareInst_Msr_Rule_103_A1_P208 actual;
+  ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
+  a_vs_b_tester.Test("cccc0011001001001111iiiiiiiiiiii");
+}
+
+TEST_F(Arm32DecoderStateTests,
+       MoveImmediate12ToApsrTester_op_22Is0_op1_19To16Is1x00_Msr_Rule_103_A1_P208_cccc001100101x001111iiiiiiiiiiii_Test) {
+  MoveImmediate12ToApsrTester_op_22Is0_op1_19To16Is1x00_Msr_Rule_103_A1_P208 baseline_tester;
+  NamedDontCareInst_Msr_Rule_103_A1_P208 actual;
+  ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
+  a_vs_b_tester.Test("cccc001100101x001111iiiiiiiiiiii");
+}
+
+TEST_F(Arm32DecoderStateTests,
        ForbiddenCondNopTester_op_22Is0_op1_19To16Isxx01_Msr_Rule_B6_1_6_A1_PB6_12_cccc00110010ii011111iiiiiiiiiiii_Test) {
   ForbiddenCondNopTester_op_22Is0_op1_19To16Isxx01_Msr_Rule_B6_1_6_A1_PB6_12 baseline_tester;
   NamedForbidden_Msr_Rule_B6_1_6_A1_PB6_12 actual;
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
   a_vs_b_tester.Test("cccc00110010ii011111iiiiiiiiiiii");
 }
 
 TEST_F(Arm32DecoderStateTests,
        ForbiddenCondNopTester_op_22Is0_op1_19To16Isxx1x_Msr_Rule_B6_1_6_A1_PB6_12_cccc00110010ii1i1111iiiiiiiiiiii_Test) {
   ForbiddenCondNopTester_op_22Is0_op1_19To16Isxx1x_Msr_Rule_B6_1_6_A1_PB6_12 baseline_tester;
@@ skipping 628 matching lines @@
 
 TEST_F(Arm32DecoderStateTests,
        StoreExclusive3RegisterOpTester_op_23To20Is1100_Strexb_Rule_203_A1_P402_cccc00011100nnnndddd11111001tttt_Test) {
   StoreExclusive3RegisterOpTester_op_23To20Is1100_Strexb_Rule_203_A1_P402 baseline_tester;
   NamedStoreBasedMemoryRtBits0To3_Strexb_Rule_203_A1_P402 actual;
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
   a_vs_b_tester.Test("cccc00011100nnnndddd11111001tttt");
 }
 
 TEST_F(Arm32DecoderStateTests,
-       LoadExclusive2RegisterOpTester_op_23To20Is1101_Ldrexb_Rule_70_A1_P144_cccc00011101nnnndddd111110011111_Test) {
+       LoadExclusive2RegisterOpTester_op_23To20Is1101_Ldrexb_Rule_70_A1_P144_cccc00011101nnnntttt111110011111_Test) {
   LoadExclusive2RegisterOpTester_op_23To20Is1101_Ldrexb_Rule_70_A1_P144 baseline_tester;
   NamedLoadBasedMemory_Ldrexb_Rule_70_A1_P144 actual;
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
-  a_vs_b_tester.Test("cccc00011101nnnndddd111110011111");
+  a_vs_b_tester.Test("cccc00011101nnnntttt111110011111");
 }
 
 TEST_F(Arm32DecoderStateTests,
        StoreExclusive3RegisterOpTester_op_23To20Is1110_Strexh_Rule_205_A1_P406_cccc00011110nnnndddd11111001tttt_Test) {
   StoreExclusive3RegisterOpTester_op_23To20Is1110_Strexh_Rule_205_A1_P406 baseline_tester;
   NamedStoreBasedMemoryRtBits0To3_Strexh_Rule_205_A1_P406 actual;
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
   a_vs_b_tester.Test("cccc00011110nnnndddd11111001tttt");
 }
 
@@ skipping 56 matching lines @@
   ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
   a_vs_b_tester.Test("1111101hiiiiiiiiiiiiiiiiiiiiiiii");
 }
 
 }  // namespace nacl_arm_test
 
 int main(int argc, char* argv[]) {
   testing::InitGoogleTest(&argc, argv);
   return RUN_ALL_TESTS();
 }