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Side by Side Diff: src/trusted/validator_arm/gen/arm32_decode_named.cc

Issue 10879090: ARM validator: continue with extra_load_store_instructions. (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client
Patch Set: "Update test_sp_updates.S and related .nexe and .err files: they were relying on UNDEFINED behavior… Created 8 years, 3 months ago
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1 /* 1 /*
2 * Copyright 2012 The Native Client Authors. All rights reserved. 2 * Copyright 2012 The Native Client Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can 3 * Use of this source code is governed by a BSD-style license that can
4 * be found in the LICENSE file. 4 * be found in the LICENSE file.
5 */ 5 */
6 6
7 // DO NOT EDIT: GENERATED CODE 7 // DO NOT EDIT: GENERATED CODE
8 8
9 #ifndef NACL_TRUSTED_BUT_NOT_TCB 9 #ifndef NACL_TRUSTED_BUT_NOT_TCB
10 #error This file is not meant for use in the TCB 10 #error This file is not meant for use in the TCB
(...skipping 204 matching lines...) Expand 10 before | Expand all | Expand 10 after
215 return decode_extra_load_store_instructions(insn); 215 return decode_extra_load_store_instructions(insn);
216 216
217 if ((insn.Bits() & 0x02000000) == 0x00000000 /* op(25:25) == 0 */ && 217 if ((insn.Bits() & 0x02000000) == 0x00000000 /* op(25:25) == 0 */ &&
218 (insn.Bits() & 0x01200000) != 0x00200000 /* op1(24:20) == ~0xx1x */ && 218 (insn.Bits() & 0x01200000) != 0x00200000 /* op1(24:20) == ~0xx1x */ &&
219 (insn.Bits() & 0x000000D0) == 0x000000D0 /* op2(7:4) == 11x1 */) 219 (insn.Bits() & 0x000000D0) == 0x000000D0 /* op2(7:4) == 11x1 */)
220 return decode_extra_load_store_instructions(insn); 220 return decode_extra_load_store_instructions(insn);
221 221
222 if ((insn.Bits() & 0x02000000) == 0x00000000 /* op(25:25) == 0 */ && 222 if ((insn.Bits() & 0x02000000) == 0x00000000 /* op(25:25) == 0 */ &&
223 (insn.Bits() & 0x01200000) == 0x00200000 /* op1(24:20) == 0xx1x */ && 223 (insn.Bits() & 0x01200000) == 0x00200000 /* op1(24:20) == 0xx1x */ &&
224 (insn.Bits() & 0x000000F0) == 0x000000B0 /* op2(7:4) == 1011 */) 224 (insn.Bits() & 0x000000F0) == 0x000000B0 /* op2(7:4) == 1011 */)
225 return Forbidden_None_instance_; 225 return ForbiddenCondNop_extra_load_store_instructions_unpriviledged_instance _;
226 226
227 if ((insn.Bits() & 0x02000000) == 0x00000000 /* op(25:25) == 0 */ && 227 if ((insn.Bits() & 0x02000000) == 0x00000000 /* op(25:25) == 0 */ &&
228 (insn.Bits() & 0x01200000) == 0x00200000 /* op1(24:20) == 0xx1x */ && 228 (insn.Bits() & 0x01200000) == 0x00200000 /* op1(24:20) == 0xx1x */ &&
229 (insn.Bits() & 0x000000D0) == 0x000000D0 /* op2(7:4) == 11x1 */) 229 (insn.Bits() & 0x000000D0) == 0x000000D0 /* op2(7:4) == 11x1 */)
230 return Forbidden_None_instance_; 230 return ForbiddenCondNop_extra_load_store_instructions_unpriviledged_instance _;
231 231
232 if ((insn.Bits() & 0x02000000) == 0x00000000 /* op(25:25) == 0 */ && 232 if ((insn.Bits() & 0x02000000) == 0x00000000 /* op(25:25) == 0 */ &&
233 (insn.Bits() & 0x01000000) == 0x00000000 /* op1(24:20) == 0xxxx */ && 233 (insn.Bits() & 0x01000000) == 0x00000000 /* op1(24:20) == 0xxxx */ &&
234 (insn.Bits() & 0x000000F0) == 0x00000090 /* op2(7:4) == 1001 */) 234 (insn.Bits() & 0x000000F0) == 0x00000090 /* op2(7:4) == 1001 */)
235 return decode_multiply_and_multiply_accumulate(insn); 235 return decode_multiply_and_multiply_accumulate(insn);
236 236
237 if ((insn.Bits() & 0x02000000) == 0x00000000 /* op(25:25) == 0 */ && 237 if ((insn.Bits() & 0x02000000) == 0x00000000 /* op(25:25) == 0 */ &&
238 (insn.Bits() & 0x01000000) == 0x01000000 /* op1(24:20) == 1xxxx */ && 238 (insn.Bits() & 0x01000000) == 0x01000000 /* op1(24:20) == 1xxxx */ &&
239 (insn.Bits() & 0x000000F0) == 0x00000090 /* op2(7:4) == 1001 */) 239 (insn.Bits() & 0x000000F0) == 0x00000090 /* op2(7:4) == 1001 */)
240 return decode_synchronization_primitives(insn); 240 return decode_synchronization_primitives(insn);
(...skipping 24 matching lines...) Expand all
265 * Specified by: ('See Section A5.2.3',) 265 * Specified by: ('See Section A5.2.3',)
266 */ 266 */
267 const NamedClassDecoder& NamedArm32DecoderState::decode_data_processing_immediat e( 267 const NamedClassDecoder& NamedArm32DecoderState::decode_data_processing_immediat e(
268 const nacl_arm_dec::Instruction insn) const { 268 const nacl_arm_dec::Instruction insn) const {
269 UNREFERENCED_PARAMETER(insn); 269 UNREFERENCED_PARAMETER(insn);
270 if ((insn.Bits() & 0x01F00000) == 0x00400000 /* op(24:20) == 00100 */ && 270 if ((insn.Bits() & 0x01F00000) == 0x00400000 /* op(24:20) == 00100 */ &&
271 (insn.Bits() & 0x000F0000) == 0x000F0000 /* Rn(19:16) == 1111 */) 271 (insn.Bits() & 0x000F0000) == 0x000F0000 /* Rn(19:16) == 1111 */)
272 return Unary1RegisterImmediateOp_Adr_Rule_10_A2_P32_instance_; 272 return Unary1RegisterImmediateOp_Adr_Rule_10_A2_P32_instance_;
273 273
274 if ((insn.Bits() & 0x01F00000) == 0x00500000 /* op(24:20) == 00101 */ && 274 if ((insn.Bits() & 0x01F00000) == 0x00500000 /* op(24:20) == 00101 */ &&
275 (insn.Bits() & 0x000F0000) == 0x000F0000 /* Rn(19:16) == 1111 */) 275 (insn.Bits() & 0x000F0000) == 0x000F0000 /* Rn(19:16) == 1111 */ &&
276 return Forbidden_None_instance_; 276 (insn.Bits() & 0x0000F000) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx1111xxxxxxxxxxxx */)
277 return ForbiddenCondNop_Subs_Pc_Lr_and_related_instructions_Rule_A1a_instanc e_;
277 278
278 if ((insn.Bits() & 0x01F00000) == 0x00800000 /* op(24:20) == 01000 */ && 279 if ((insn.Bits() & 0x01F00000) == 0x00800000 /* op(24:20) == 01000 */ &&
279 (insn.Bits() & 0x000F0000) == 0x000F0000 /* Rn(19:16) == 1111 */) 280 (insn.Bits() & 0x000F0000) == 0x000F0000 /* Rn(19:16) == 1111 */)
280 return Unary1RegisterImmediateOp_Adr_Rule_10_A1_P32_instance_; 281 return Unary1RegisterImmediateOp_Adr_Rule_10_A1_P32_instance_;
281 282
282 if ((insn.Bits() & 0x01F00000) == 0x00900000 /* op(24:20) == 01001 */ && 283 if ((insn.Bits() & 0x01F00000) == 0x00900000 /* op(24:20) == 01001 */ &&
283 (insn.Bits() & 0x000F0000) == 0x000F0000 /* Rn(19:16) == 1111 */) 284 (insn.Bits() & 0x000F0000) == 0x000F0000 /* Rn(19:16) == 1111 */ &&
284 return Forbidden_None_instance_; 285 (insn.Bits() & 0x0000F000) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx1111xxxxxxxxxxxx */)
286 return ForbiddenCondNop_Subs_Pc_Lr_and_related_instructions_Rule_A1b_instanc e_;
285 287
286 if ((insn.Bits() & 0x01F00000) == 0x01100000 /* op(24:20) == 10001 */ && 288 if ((insn.Bits() & 0x01F00000) == 0x01100000 /* op(24:20) == 10001 */ &&
287 (insn.Bits() & 0x0000F000) == 0x00000000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx0000xxxxxxxxxxxx */) 289 (insn.Bits() & 0x0000F000) == 0x00000000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx0000xxxxxxxxxxxx */)
288 return MaskedBinaryRegisterImmediateTest_Tst_Rule_230_A1_P454_instance_; 290 return MaskedBinaryRegisterImmediateTest_Tst_Rule_230_A1_P454_instance_;
289 291
290 if ((insn.Bits() & 0x01F00000) == 0x01300000 /* op(24:20) == 10011 */ && 292 if ((insn.Bits() & 0x01F00000) == 0x01300000 /* op(24:20) == 10011 */ &&
291 (insn.Bits() & 0x0000F000) == 0x00000000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx0000xxxxxxxxxxxx */) 293 (insn.Bits() & 0x0000F000) == 0x00000000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx0000xxxxxxxxxxxx */)
292 return BinaryRegisterImmediateTest_Teq_Rule_227_A1_P448_instance_; 294 return BinaryRegisterImmediateTest_Teq_Rule_227_A1_P448_instance_;
293 295
294 if ((insn.Bits() & 0x01F00000) == 0x01500000 /* op(24:20) == 10101 */ && 296 if ((insn.Bits() & 0x01F00000) == 0x01500000 /* op(24:20) == 10101 */ &&
(...skipping 436 matching lines...) Expand 10 before | Expand all | Expand 10 after
731 733
732 734
733 /* 735 /*
734 * Implementation of table load_store_word_and_unsigned_byte. 736 * Implementation of table load_store_word_and_unsigned_byte.
735 * Specified by: ('See Section A5.3',) 737 * Specified by: ('See Section A5.3',)
736 */ 738 */
737 const NamedClassDecoder& NamedArm32DecoderState::decode_load_store_word_and_unsi gned_byte( 739 const NamedClassDecoder& NamedArm32DecoderState::decode_load_store_word_and_unsi gned_byte(
738 const nacl_arm_dec::Instruction insn) const { 740 const nacl_arm_dec::Instruction insn) const {
739 741
740 if ((insn.Bits() & 0x02000000) == 0x00000000 /* A(25:25) == 0 */ && 742 if ((insn.Bits() & 0x02000000) == 0x00000000 /* A(25:25) == 0 */ &&
743 (insn.Bits() & 0x01700000) == 0x00200000 /* op1(24:20) == 0x010 */)
744 return ForbiddenCondNop_Strt_Rule_A1_instance_;
745
746 if ((insn.Bits() & 0x02000000) == 0x00000000 /* A(25:25) == 0 */ &&
747 (insn.Bits() & 0x01700000) == 0x00300000 /* op1(24:20) == 0x011 */)
748 return ForbiddenCondNop_Ldrt_Rule_A1_instance_;
749
750 if ((insn.Bits() & 0x02000000) == 0x00000000 /* A(25:25) == 0 */ &&
751 (insn.Bits() & 0x01700000) == 0x00600000 /* op1(24:20) == 0x110 */)
752 return ForbiddenCondNop_Strtb_Rule_A1_instance_;
753
754 if ((insn.Bits() & 0x02000000) == 0x00000000 /* A(25:25) == 0 */ &&
755 (insn.Bits() & 0x01700000) == 0x00700000 /* op1(24:20) == 0x111 */)
756 return ForbiddenCondNop_Ldrtb_Rule_A1_instance_;
757
758 if ((insn.Bits() & 0x02000000) == 0x00000000 /* A(25:25) == 0 */ &&
741 (insn.Bits() & 0x00500000) == 0x00000000 /* op1(24:20) == xx0x0 */ && 759 (insn.Bits() & 0x00500000) == 0x00000000 /* op1(24:20) == xx0x0 */ &&
742 (insn.Bits() & 0x01700000) != 0x00200000 /* op1_repeated(24:20) == ~0x010 */) 760 (insn.Bits() & 0x01700000) != 0x00200000 /* op1_repeated(24:20) == ~0x010 */)
743 return decode_load_store_word_and_unsigned_byte_str_or_push(insn); 761 return decode_load_store_word_and_unsigned_byte_str_or_push(insn);
744 762
745 if ((insn.Bits() & 0x02000000) == 0x00000000 /* A(25:25) == 0 */ && 763 if ((insn.Bits() & 0x02000000) == 0x00000000 /* A(25:25) == 0 */ &&
746 (insn.Bits() & 0x00500000) == 0x00100000 /* op1(24:20) == xx0x1 */ && 764 (insn.Bits() & 0x00500000) == 0x00100000 /* op1(24:20) == xx0x1 */ &&
747 (insn.Bits() & 0x000F0000) != 0x000F0000 /* Rn(19:16) == ~1111 */ && 765 (insn.Bits() & 0x000F0000) != 0x000F0000 /* Rn(19:16) == ~1111 */ &&
748 (insn.Bits() & 0x01700000) != 0x00300000 /* op1_repeated(24:20) == ~0x011 */) 766 (insn.Bits() & 0x01700000) != 0x00300000 /* op1_repeated(24:20) == ~0x011 */)
749 return Load2RegisterImm12Op_Ldr_Rule_58_A1_P120_instance_; 767 return Load2RegisterImm12Op_Ldr_Rule_58_A1_P120_instance_;
750 768
(...skipping 15 matching lines...) Expand all
766 (insn.Bits() & 0x01700000) != 0x00700000 /* op1_repeated(24:20) == ~0x111 */) 784 (insn.Bits() & 0x01700000) != 0x00700000 /* op1_repeated(24:20) == ~0x111 */)
767 return Load2RegisterImm12Op_Ldrb_Rule_62_A1_P128_instance_; 785 return Load2RegisterImm12Op_Ldrb_Rule_62_A1_P128_instance_;
768 786
769 if ((insn.Bits() & 0x02000000) == 0x00000000 /* A(25:25) == 0 */ && 787 if ((insn.Bits() & 0x02000000) == 0x00000000 /* A(25:25) == 0 */ &&
770 (insn.Bits() & 0x00500000) == 0x00500000 /* op1(24:20) == xx1x1 */ && 788 (insn.Bits() & 0x00500000) == 0x00500000 /* op1(24:20) == xx1x1 */ &&
771 (insn.Bits() & 0x000F0000) == 0x000F0000 /* Rn(19:16) == 1111 */ && 789 (insn.Bits() & 0x000F0000) == 0x000F0000 /* Rn(19:16) == 1111 */ &&
772 (insn.Bits() & 0x01700000) != 0x00700000 /* op1_repeated(24:20) == ~0x111 */ && 790 (insn.Bits() & 0x01700000) != 0x00700000 /* op1_repeated(24:20) == ~0x111 */ &&
773 (insn.Bits() & 0x01200000) == 0x01000000 /* $pattern(31:0) == xxxxxxx1xx0x xxxxxxxxxxxxxxxxxxxx */) 791 (insn.Bits() & 0x01200000) == 0x01000000 /* $pattern(31:0) == xxxxxxx1xx0x xxxxxxxxxxxxxxxxxxxx */)
774 return Load2RegisterImm12Op_Ldrb_Rule_63_A1_P130_instance_; 792 return Load2RegisterImm12Op_Ldrb_Rule_63_A1_P130_instance_;
775 793
776 if ((insn.Bits() & 0x02000000) == 0x00000000 /* A(25:25) == 0 */ && 794 if ((insn.Bits() & 0x02000000) == 0x02000000 /* A(25:25) == 1 */ &&
777 (insn.Bits() & 0x01200000) == 0x00200000 /* op1(24:20) == 0xx1x */) 795 (insn.Bits() & 0x01700000) == 0x00200000 /* op1(24:20) == 0x010 */ &&
778 return Forbidden_None_instance_; 796 (insn.Bits() & 0x00000010) == 0x00000000 /* B(4:4) == 0 */)
797 return ForbiddenCondNop_Strt_Rule_A2_instance_;
798
799 if ((insn.Bits() & 0x02000000) == 0x02000000 /* A(25:25) == 1 */ &&
800 (insn.Bits() & 0x01700000) == 0x00300000 /* op1(24:20) == 0x011 */ &&
801 (insn.Bits() & 0x00000010) == 0x00000000 /* B(4:4) == 0 */)
802 return ForbiddenCondNop_Ldrt_Rule_A2_instance_;
803
804 if ((insn.Bits() & 0x02000000) == 0x02000000 /* A(25:25) == 1 */ &&
805 (insn.Bits() & 0x01700000) == 0x00600000 /* op1(24:20) == 0x110 */ &&
806 (insn.Bits() & 0x00000010) == 0x00000000 /* B(4:4) == 0 */)
807 return ForbiddenCondNop_Strtb_Rule_A2_instance_;
808
809 if ((insn.Bits() & 0x02000000) == 0x02000000 /* A(25:25) == 1 */ &&
810 (insn.Bits() & 0x01700000) == 0x00700000 /* op1(24:20) == 0x111 */ &&
811 (insn.Bits() & 0x00000010) == 0x00000000 /* B(4:4) == 0 */)
812 return ForbiddenCondNop_Ldrtb_Rule_A2_instance_;
779 813
780 if ((insn.Bits() & 0x02000000) == 0x02000000 /* A(25:25) == 1 */ && 814 if ((insn.Bits() & 0x02000000) == 0x02000000 /* A(25:25) == 1 */ &&
781 (insn.Bits() & 0x00500000) == 0x00000000 /* op1(24:20) == xx0x0 */ && 815 (insn.Bits() & 0x00500000) == 0x00000000 /* op1(24:20) == xx0x0 */ &&
782 (insn.Bits() & 0x00000010) == 0x00000000 /* B(4:4) == 0 */ && 816 (insn.Bits() & 0x00000010) == 0x00000000 /* B(4:4) == 0 */ &&
783 (insn.Bits() & 0x01700000) != 0x00200000 /* op1_repeated(24:20) == ~0x010 */) 817 (insn.Bits() & 0x01700000) != 0x00200000 /* op1_repeated(24:20) == ~0x010 */)
784 return Store3RegisterImm5Op_Str_Rule_195_A1_P386_instance_; 818 return Store3RegisterImm5Op_Str_Rule_195_A1_P386_instance_;
785 819
786 if ((insn.Bits() & 0x02000000) == 0x02000000 /* A(25:25) == 1 */ && 820 if ((insn.Bits() & 0x02000000) == 0x02000000 /* A(25:25) == 1 */ &&
787 (insn.Bits() & 0x00500000) == 0x00100000 /* op1(24:20) == xx0x1 */ && 821 (insn.Bits() & 0x00500000) == 0x00100000 /* op1(24:20) == xx0x1 */ &&
788 (insn.Bits() & 0x00000010) == 0x00000000 /* B(4:4) == 0 */ && 822 (insn.Bits() & 0x00000010) == 0x00000000 /* B(4:4) == 0 */ &&
789 (insn.Bits() & 0x01700000) != 0x00300000 /* op1_repeated(24:20) == ~0x011 */) 823 (insn.Bits() & 0x01700000) != 0x00300000 /* op1_repeated(24:20) == ~0x011 */)
790 return Load3RegisterImm5Op_Ldr_Rule_60_A1_P124_instance_; 824 return Load3RegisterImm5Op_Ldr_Rule_60_A1_P124_instance_;
791 825
792 if ((insn.Bits() & 0x02000000) == 0x02000000 /* A(25:25) == 1 */ && 826 if ((insn.Bits() & 0x02000000) == 0x02000000 /* A(25:25) == 1 */ &&
793 (insn.Bits() & 0x00500000) == 0x00400000 /* op1(24:20) == xx1x0 */ && 827 (insn.Bits() & 0x00500000) == 0x00400000 /* op1(24:20) == xx1x0 */ &&
794 (insn.Bits() & 0x00000010) == 0x00000000 /* B(4:4) == 0 */ && 828 (insn.Bits() & 0x00000010) == 0x00000000 /* B(4:4) == 0 */ &&
795 (insn.Bits() & 0x01700000) != 0x00600000 /* op1_repeated(24:20) == ~0x110 */) 829 (insn.Bits() & 0x01700000) != 0x00600000 /* op1_repeated(24:20) == ~0x110 */)
796 return Store3RegisterImm5Op_Strb_Rule_198_A1_P392_instance_; 830 return Store3RegisterImm5Op_Strb_Rule_198_A1_P392_instance_;
797 831
798 if ((insn.Bits() & 0x02000000) == 0x02000000 /* A(25:25) == 1 */ && 832 if ((insn.Bits() & 0x02000000) == 0x02000000 /* A(25:25) == 1 */ &&
799 (insn.Bits() & 0x00500000) == 0x00500000 /* op1(24:20) == xx1x1 */ && 833 (insn.Bits() & 0x00500000) == 0x00500000 /* op1(24:20) == xx1x1 */ &&
800 (insn.Bits() & 0x00000010) == 0x00000000 /* B(4:4) == 0 */ && 834 (insn.Bits() & 0x00000010) == 0x00000000 /* B(4:4) == 0 */ &&
801 (insn.Bits() & 0x01700000) != 0x00700000 /* op1_repeated(24:20) == ~0x111 */) 835 (insn.Bits() & 0x01700000) != 0x00700000 /* op1_repeated(24:20) == ~0x111 */)
802 return Load3RegisterImm5Op_Ldrb_Rule_64_A1_P132_instance_; 836 return Load3RegisterImm5Op_Ldrb_Rule_64_A1_P132_instance_;
803 837
804 if ((insn.Bits() & 0x02000000) == 0x02000000 /* A(25:25) == 1 */ &&
805 (insn.Bits() & 0x01200000) == 0x00200000 /* op1(24:20) == 0xx1x */ &&
806 (insn.Bits() & 0x00000010) == 0x00000000 /* B(4:4) == 0 */)
807 return Forbidden_None_instance_;
808
809 // Catch any attempt to fall through... 838 // Catch any attempt to fall through...
810 return not_implemented_; 839 return not_implemented_;
811 } 840 }
812 841
813 842
814 /* 843 /*
815 * Implementation of table load_store_word_and_unsigned_byte_str_or_push. 844 * Implementation of table load_store_word_and_unsigned_byte_str_or_push.
816 * Specified by: ('See Section A5.3',) 845 * Specified by: ('See Section A5.3',)
817 */ 846 */
818 const NamedClassDecoder& NamedArm32DecoderState::decode_load_store_word_and_unsi gned_byte_str_or_push( 847 const NamedClassDecoder& NamedArm32DecoderState::decode_load_store_word_and_unsi gned_byte_str_or_push(
(...skipping 154 matching lines...) Expand 10 before | Expand all | Expand 10 after
973 1002
974 1003
975 /* 1004 /*
976 * Implementation of table miscellaneous_instructions. 1005 * Implementation of table miscellaneous_instructions.
977 * Specified by: ('See Section A5.2.12',) 1006 * Specified by: ('See Section A5.2.12',)
978 */ 1007 */
979 const NamedClassDecoder& NamedArm32DecoderState::decode_miscellaneous_instructio ns( 1008 const NamedClassDecoder& NamedArm32DecoderState::decode_miscellaneous_instructio ns(
980 const nacl_arm_dec::Instruction insn) const { 1009 const nacl_arm_dec::Instruction insn) const {
981 1010
982 if ((insn.Bits() & 0x00000070) == 0x00000000 /* op2(6:4) == 000 */ && 1011 if ((insn.Bits() & 0x00000070) == 0x00000000 /* op2(6:4) == 000 */ &&
1012 (insn.Bits() & 0x00000200) == 0x00000000 /* B(9:9) == 0 */ &&
983 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */ && 1013 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */ &&
984 (insn.Bits() & 0x00030000) == 0x00000000 /* op1(19:16) == xx00 */ && 1014 (insn.Bits() & 0x00030000) == 0x00000000 /* op1(19:16) == xx00 */ &&
985 (insn.Bits() & 0x0000FF00) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx11110000xxxxxxxx */) 1015 (insn.Bits() & 0x0000FD00) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx111100x0xxxxxxxx */)
986 return Unary1RegisterUse_Msr_Rule_104_A1_P210_instance_; 1016 return Unary1RegisterUse_Msr_Rule_104_A1_P210_instance_;
987 1017
988 if ((insn.Bits() & 0x00000070) == 0x00000000 /* op2(6:4) == 000 */ && 1018 if ((insn.Bits() & 0x00000070) == 0x00000000 /* op2(6:4) == 000 */ &&
1019 (insn.Bits() & 0x00000200) == 0x00000000 /* B(9:9) == 0 */ &&
989 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */ && 1020 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */ &&
990 (insn.Bits() & 0x00030000) == 0x00010000 /* op1(19:16) == xx01 */ && 1021 (insn.Bits() & 0x00030000) == 0x00010000 /* op1(19:16) == xx01 */ &&
991 (insn.Bits() & 0x0000FF00) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx11110000xxxxxxxx */) 1022 (insn.Bits() & 0x0000FD00) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx111100x0xxxxxxxx */)
992 return ForbiddenCondNop_Msr_Rule_B6_1_7_P14_instance_; 1023 return ForbiddenCondNop_Msr_Rule_B6_1_7_P14_instance_;
993 1024
994 if ((insn.Bits() & 0x00000070) == 0x00000000 /* op2(6:4) == 000 */ && 1025 if ((insn.Bits() & 0x00000070) == 0x00000000 /* op2(6:4) == 000 */ &&
1026 (insn.Bits() & 0x00000200) == 0x00000000 /* B(9:9) == 0 */ &&
995 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */ && 1027 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */ &&
996 (insn.Bits() & 0x00020000) == 0x00020000 /* op1(19:16) == xx1x */ && 1028 (insn.Bits() & 0x00020000) == 0x00020000 /* op1(19:16) == xx1x */ &&
997 (insn.Bits() & 0x0000FF00) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx11110000xxxxxxxx */) 1029 (insn.Bits() & 0x0000FD00) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx111100x0xxxxxxxx */)
998 return ForbiddenCondNop_Msr_Rule_B6_1_7_P14_instance_; 1030 return ForbiddenCondNop_Msr_Rule_B6_1_7_P14_instance_;
999 1031
1000 if ((insn.Bits() & 0x00000070) == 0x00000000 /* op2(6:4) == 000 */ && 1032 if ((insn.Bits() & 0x00000070) == 0x00000000 /* op2(6:4) == 000 */ &&
1033 (insn.Bits() & 0x00000200) == 0x00000000 /* B(9:9) == 0 */ &&
1001 (insn.Bits() & 0x00600000) == 0x00600000 /* op(22:21) == 11 */ && 1034 (insn.Bits() & 0x00600000) == 0x00600000 /* op(22:21) == 11 */ &&
1002 (insn.Bits() & 0x0000FF00) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx11110000xxxxxxxx */) 1035 (insn.Bits() & 0x0000FD00) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx111100x0xxxxxxxx */)
1003 return ForbiddenCondNop_Msr_Rule_B6_1_7_P14_instance_; 1036 return ForbiddenCondNop_Msr_Rule_B6_1_7_P14_instance_;
1004 1037
1005 if ((insn.Bits() & 0x00000070) == 0x00000000 /* op2(6:4) == 000 */ && 1038 if ((insn.Bits() & 0x00000070) == 0x00000000 /* op2(6:4) == 000 */ &&
1039 (insn.Bits() & 0x00000200) == 0x00000000 /* B(9:9) == 0 */ &&
1006 (insn.Bits() & 0x00200000) == 0x00000000 /* op(22:21) == x0 */ && 1040 (insn.Bits() & 0x00200000) == 0x00000000 /* op(22:21) == x0 */ &&
1007 (insn.Bits() & 0x000F0F0F) == 0x000F0000 /* $pattern(31:0) == xxxxxxxxxxxx 1111xxxx0000xxxx0000 */) 1041 (insn.Bits() & 0x000F0D0F) == 0x000F0000 /* $pattern(31:0) == xxxxxxxxxxxx 1111xxxx00x0xxxx0000 */)
1008 return Unary1RegisterSet_Mrs_Rule_102_A1_P206_Or_B6_10_instance_; 1042 return Unary1RegisterSet_Mrs_Rule_102_A1_P206_Or_B6_10_instance_;
1009 1043
1044 if ((insn.Bits() & 0x00000070) == 0x00000000 /* op2(6:4) == 000 */ &&
1045 (insn.Bits() & 0x00000200) == 0x00000200 /* B(9:9) == 1 */ &&
1046 (insn.Bits() & 0x00200000) == 0x00000000 /* op(22:21) == x0 */ &&
1047 (insn.Bits() & 0x00000C0F) == 0x00000000 /* $pattern(31:0) == xxxxxxxxxxxx xxxxxxxx00xxxxxx0000 */)
1048 return ForbiddenCondNop_Msr_Rule_Banked_register_A1_B9_1990_instance_;
1049
1050 if ((insn.Bits() & 0x00000070) == 0x00000000 /* op2(6:4) == 000 */ &&
1051 (insn.Bits() & 0x00000200) == 0x00000200 /* B(9:9) == 1 */ &&
1052 (insn.Bits() & 0x00200000) == 0x00200000 /* op(22:21) == x1 */ &&
1053 (insn.Bits() & 0x0000FC00) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx111100xxxxxxxxxx */)
1054 return ForbiddenCondNop_Msr_Rule_Banked_register_A1_B9_1992_instance_;
1055
1010 if ((insn.Bits() & 0x00000070) == 0x00000010 /* op2(6:4) == 001 */ && 1056 if ((insn.Bits() & 0x00000070) == 0x00000010 /* op2(6:4) == 001 */ &&
1011 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */ && 1057 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */ &&
1012 (insn.Bits() & 0x000FFF00) == 0x000FFF00 /* $pattern(31:0) == xxxxxxxxxxxx 111111111111xxxxxxxx */) 1058 (insn.Bits() & 0x000FFF00) == 0x000FFF00 /* $pattern(31:0) == xxxxxxxxxxxx 111111111111xxxxxxxx */)
1013 return BranchToRegister_Bx_Rule_25_A1_P62_instance_; 1059 return BranchToRegister_Bx_Rule_25_A1_P62_instance_;
1014 1060
1015 if ((insn.Bits() & 0x00000070) == 0x00000010 /* op2(6:4) == 001 */ && 1061 if ((insn.Bits() & 0x00000070) == 0x00000010 /* op2(6:4) == 001 */ &&
1016 (insn.Bits() & 0x00600000) == 0x00600000 /* op(22:21) == 11 */ && 1062 (insn.Bits() & 0x00600000) == 0x00600000 /* op(22:21) == 11 */ &&
1017 (insn.Bits() & 0x000F0F00) == 0x000F0F00 /* $pattern(31:0) == xxxxxxxxxxxx 1111xxxx1111xxxxxxxx */) 1063 (insn.Bits() & 0x000F0F00) == 0x000F0F00 /* $pattern(31:0) == xxxxxxxxxxxx 1111xxxx1111xxxxxxxx */)
1018 return Unary2RegisterOpNotRmIsPc_Clz_Rule_31_A1_P72_instance_; 1064 return Unary2RegisterOpNotRmIsPc_Clz_Rule_31_A1_P72_instance_;
1019 1065
1020 if ((insn.Bits() & 0x00000070) == 0x00000020 /* op2(6:4) == 010 */ && 1066 if ((insn.Bits() & 0x00000070) == 0x00000020 /* op2(6:4) == 010 */ &&
1021 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */ && 1067 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */ &&
1022 (insn.Bits() & 0x000FFF00) == 0x000FFF00 /* $pattern(31:0) == xxxxxxxxxxxx 111111111111xxxxxxxx */) 1068 (insn.Bits() & 0x000FFF00) == 0x000FFF00 /* $pattern(31:0) == xxxxxxxxxxxx 111111111111xxxxxxxx */)
1023 return ForbiddenCondNop_Bxj_Rule_26_A1_P64_instance_; 1069 return ForbiddenCondNop_Bxj_Rule_26_A1_P64_instance_;
1024 1070
1025 if ((insn.Bits() & 0x00000070) == 0x00000030 /* op2(6:4) == 011 */ && 1071 if ((insn.Bits() & 0x00000070) == 0x00000030 /* op2(6:4) == 011 */ &&
1026 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */ && 1072 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */ &&
1027 (insn.Bits() & 0x000FFF00) == 0x000FFF00 /* $pattern(31:0) == xxxxxxxxxxxx 111111111111xxxxxxxx */) 1073 (insn.Bits() & 0x000FFF00) == 0x000FFF00 /* $pattern(31:0) == xxxxxxxxxxxx 111111111111xxxxxxxx */)
1028 return BranchToRegister_Blx_Rule_24_A1_P60_instance_; 1074 return BranchToRegister_Blx_Rule_24_A1_P60_instance_;
1029 1075
1030 if ((insn.Bits() & 0x00000070) == 0x00000050 /* op2(6:4) == 101 */) 1076 if ((insn.Bits() & 0x00000070) == 0x00000050 /* op2(6:4) == 101 */)
1031 return decode_saturating_addition_and_subtraction(insn); 1077 return decode_saturating_addition_and_subtraction(insn);
1032 1078
1079 if ((insn.Bits() & 0x00000070) == 0x00000060 /* op2(6:4) == 110 */ &&
1080 (insn.Bits() & 0x00600000) == 0x00600000 /* op(22:21) == 11 */ &&
1081 (insn.Bits() & 0x000FFF0F) == 0x0000000E /* $pattern(31:0) == xxxxxxxxxxxx 000000000000xxxx1110 */)
1082 return ForbiddenCondNop_Eret_Rule_A1_instance_;
1083
1033 if ((insn.Bits() & 0x00000070) == 0x00000070 /* op2(6:4) == 111 */ && 1084 if ((insn.Bits() & 0x00000070) == 0x00000070 /* op2(6:4) == 111 */ &&
1034 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */) 1085 (insn.Bits() & 0x00600000) == 0x00200000 /* op(22:21) == 01 */)
1035 return BreakPointAndConstantPoolHead_Bkpt_Rule_22_A1_P56_instance_; 1086 return BreakPointAndConstantPoolHead_Bkpt_Rule_22_A1_P56_instance_;
1036 1087
1037 if ((insn.Bits() & 0x00000070) == 0x00000070 /* op2(6:4) == 111 */ && 1088 if ((insn.Bits() & 0x00000070) == 0x00000070 /* op2(6:4) == 111 */ &&
1089 (insn.Bits() & 0x00600000) == 0x00400000 /* op(22:21) == 10 */)
1090 return ForbiddenCondNop_Hvc_Rule_A1_instance_;
1091
1092 if ((insn.Bits() & 0x00000070) == 0x00000070 /* op2(6:4) == 111 */ &&
1038 (insn.Bits() & 0x00600000) == 0x00600000 /* op(22:21) == 11 */ && 1093 (insn.Bits() & 0x00600000) == 0x00600000 /* op(22:21) == 11 */ &&
1039 (insn.Bits() & 0x000FFF00) == 0x00000000 /* $pattern(31:0) == xxxxxxxxxxxx 000000000000xxxxxxxx */) 1094 (insn.Bits() & 0x000FFF00) == 0x00000000 /* $pattern(31:0) == xxxxxxxxxxxx 000000000000xxxxxxxx */)
1040 return ForbiddenCondNop_Smc_Rule_B6_1_9_P18_instance_; 1095 return ForbiddenCondNop_Smc_Rule_B6_1_9_P18_instance_;
1041 1096
1042 if (true && 1097 if (true &&
1043 true /* $pattern(31:0) == xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx */) 1098 true /* $pattern(31:0) == xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx */)
1044 return Undefined_None_instance_; 1099 return Undefined_None_instance_;
1045 1100
1046 // Catch any attempt to fall through... 1101 // Catch any attempt to fall through...
1047 return not_implemented_; 1102 return not_implemented_;
(...skipping 37 matching lines...) Expand 10 before | Expand all | Expand 10 after
1085 (insn.Bits() & 0x0000FF00) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx11110000xxxxxxxx */) 1140 (insn.Bits() & 0x0000FF00) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx11110000xxxxxxxx */)
1086 return ForbiddenCondNop_Sev_Rule_158_A1_P316_instance_; 1141 return ForbiddenCondNop_Sev_Rule_158_A1_P316_instance_;
1087 1142
1088 if ((insn.Bits() & 0x00400000) == 0x00000000 /* op(22:22) == 0 */ && 1143 if ((insn.Bits() & 0x00400000) == 0x00000000 /* op(22:22) == 0 */ &&
1089 (insn.Bits() & 0x000F0000) == 0x00000000 /* op1(19:16) == 0000 */ && 1144 (insn.Bits() & 0x000F0000) == 0x00000000 /* op1(19:16) == 0000 */ &&
1090 (insn.Bits() & 0x000000F0) == 0x000000F0 /* op2(7:0) == 1111xxxx */ && 1145 (insn.Bits() & 0x000000F0) == 0x000000F0 /* op2(7:0) == 1111xxxx */ &&
1091 (insn.Bits() & 0x0000FF00) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx11110000xxxxxxxx */) 1146 (insn.Bits() & 0x0000FF00) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx11110000xxxxxxxx */)
1092 return CondNop_Dbg_Rule_40_A1_P88_instance_; 1147 return CondNop_Dbg_Rule_40_A1_P88_instance_;
1093 1148
1094 if ((insn.Bits() & 0x00400000) == 0x00000000 /* op(22:22) == 0 */ && 1149 if ((insn.Bits() & 0x00400000) == 0x00000000 /* op(22:22) == 0 */ &&
1095 (insn.Bits() & 0x000F0000) == 0x00040000 /* op1(19:16) == 0100 */) 1150 (insn.Bits() & 0x000F0000) == 0x00040000 /* op1(19:16) == 0100 */ &&
1151 (insn.Bits() & 0x0000F000) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx1111xxxxxxxxxxxx */)
1096 return MoveImmediate12ToApsr_Msr_Rule_103_A1_P208_instance_; 1152 return MoveImmediate12ToApsr_Msr_Rule_103_A1_P208_instance_;
1097 1153
1098 if ((insn.Bits() & 0x00400000) == 0x00000000 /* op(22:22) == 0 */ && 1154 if ((insn.Bits() & 0x00400000) == 0x00000000 /* op(22:22) == 0 */ &&
1099 (insn.Bits() & 0x000B0000) == 0x00080000 /* op1(19:16) == 1x00 */) 1155 (insn.Bits() & 0x000B0000) == 0x00080000 /* op1(19:16) == 1x00 */ &&
1156 (insn.Bits() & 0x0000F000) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx1111xxxxxxxxxxxx */)
1100 return MoveImmediate12ToApsr_Msr_Rule_103_A1_P208_instance_; 1157 return MoveImmediate12ToApsr_Msr_Rule_103_A1_P208_instance_;
1101 1158
1102 if ((insn.Bits() & 0x00400000) == 0x00000000 /* op(22:22) == 0 */ && 1159 if ((insn.Bits() & 0x00400000) == 0x00000000 /* op(22:22) == 0 */ &&
1103 (insn.Bits() & 0x00030000) == 0x00010000 /* op1(19:16) == xx01 */ && 1160 (insn.Bits() & 0x00030000) == 0x00010000 /* op1(19:16) == xx01 */ &&
1104 (insn.Bits() & 0x0000F000) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx1111xxxxxxxxxxxx */) 1161 (insn.Bits() & 0x0000F000) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx1111xxxxxxxxxxxx */)
1105 return ForbiddenCondNop_Msr_Rule_B6_1_6_A1_PB6_12_instance_; 1162 return ForbiddenCondNop_Msr_Rule_B6_1_6_A1_PB6_12_instance_;
1106 1163
1107 if ((insn.Bits() & 0x00400000) == 0x00000000 /* op(22:22) == 0 */ && 1164 if ((insn.Bits() & 0x00400000) == 0x00000000 /* op(22:22) == 0 */ &&
1108 (insn.Bits() & 0x00020000) == 0x00020000 /* op1(19:16) == xx1x */ && 1165 (insn.Bits() & 0x00020000) == 0x00020000 /* op1(19:16) == xx1x */ &&
1109 (insn.Bits() & 0x0000F000) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx1111xxxxxxxxxxxx */) 1166 (insn.Bits() & 0x0000F000) == 0x0000F000 /* $pattern(31:0) == xxxxxxxxxxxx xxxx1111xxxxxxxxxxxx */)
(...skipping 579 matching lines...) Expand 10 before | Expand all | Expand 10 after
1689 return LoadExclusive2RegisterOp_Ldrexb_Rule_70_A1_P144_instance_; 1746 return LoadExclusive2RegisterOp_Ldrexb_Rule_70_A1_P144_instance_;
1690 1747
1691 if ((insn.Bits() & 0x00F00000) == 0x00E00000 /* op(23:20) == 1110 */ && 1748 if ((insn.Bits() & 0x00F00000) == 0x00E00000 /* op(23:20) == 1110 */ &&
1692 (insn.Bits() & 0x00000F00) == 0x00000F00 /* $pattern(31:0) == xxxxxxxxxxxx xxxxxxxx1111xxxxxxxx */) 1749 (insn.Bits() & 0x00000F00) == 0x00000F00 /* $pattern(31:0) == xxxxxxxxxxxx xxxxxxxx1111xxxxxxxx */)
1693 return StoreExclusive3RegisterOp_Strexh_Rule_205_A1_P406_instance_; 1750 return StoreExclusive3RegisterOp_Strexh_Rule_205_A1_P406_instance_;
1694 1751
1695 if ((insn.Bits() & 0x00F00000) == 0x00F00000 /* op(23:20) == 1111 */ && 1752 if ((insn.Bits() & 0x00F00000) == 0x00F00000 /* op(23:20) == 1111 */ &&
1696 (insn.Bits() & 0x00000F0F) == 0x00000F0F /* $pattern(31:0) == xxxxxxxxxxxx xxxxxxxx1111xxxx1111 */) 1753 (insn.Bits() & 0x00000F0F) == 0x00000F0F /* $pattern(31:0) == xxxxxxxxxxxx xxxxxxxx1111xxxx1111 */)
1697 return LoadExclusive2RegisterOp_Ldrexh_Rule_72_A1_P148_instance_; 1754 return LoadExclusive2RegisterOp_Ldrexh_Rule_72_A1_P148_instance_;
1698 1755
1699 if ((insn.Bits() & 0x00B00000) == 0x00000000 /* op(23:20) == 0x00 */) 1756 if ((insn.Bits() & 0x00B00000) == 0x00000000 /* op(23:20) == 0x00 */ &&
1700 return Deprecated_None_instance_; 1757 (insn.Bits() & 0x00000F00) == 0x00000000 /* $pattern(31:0) == xxxxxxxxxxxx xxxxxxxx0000xxxxxxxx */)
1758 return Deprecated_Swp_Swpb_Rule_A1_instance_;
1701 1759
1702 if (true && 1760 if (true &&
1703 true /* $pattern(31:0) == xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx */) 1761 true /* $pattern(31:0) == xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx */)
1704 return Undefined_None_instance_; 1762 return Undefined_None_instance_;
1705 1763
1706 // Catch any attempt to fall through... 1764 // Catch any attempt to fall through...
1707 return not_implemented_; 1765 return not_implemented_;
1708 } 1766 }
1709 1767
1710 1768
(...skipping 127 matching lines...) Expand 10 before | Expand all | Expand 10 after
1838 decode_named(const nacl_arm_dec::Instruction insn) const { 1896 decode_named(const nacl_arm_dec::Instruction insn) const {
1839 return decode_ARMv7(insn); 1897 return decode_ARMv7(insn);
1840 } 1898 }
1841 1899
1842 const nacl_arm_dec::ClassDecoder& NamedArm32DecoderState:: 1900 const nacl_arm_dec::ClassDecoder& NamedArm32DecoderState::
1843 decode(const nacl_arm_dec::Instruction insn) const { 1901 decode(const nacl_arm_dec::Instruction insn) const {
1844 return decode_named(insn).named_decoder(); 1902 return decode_named(insn).named_decoder();
1845 } 1903 }
1846 1904
1847 } // namespace nacl_arm_test 1905 } // namespace nacl_arm_test
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