Add support for XMM registers in SSA code generation pipeline.

runtime/vm/intermediate_language.cc

Index: runtime/vm/intermediate_language.cc
diff --git a/runtime/vm/intermediate_language.cc b/runtime/vm/intermediate_language.cc
index 5927c3dc5ef8e967f51afc1edbfd4ea1a2d079b9..9ebb6fb178cefaec0fb35c80372b0a068b8aae13 100644
--- a/runtime/vm/intermediate_language.cc
+++ b/runtime/vm/intermediate_language.cc
@@ -1023,6 +1023,26 @@ intptr_t BinaryDoubleOpComp::ResultCid() const {
 }
 
 
+RawAbstractType* UnboxedDoubleBinaryOpComp::CompileType() const {
+  return Type::DoubleInterface();
+}
+
+
+RawAbstractType* UnboxDoubleComp::CompileType() const {
+  return Type::null();
+}
+
+
+intptr_t BoxDoubleComp::ResultCid() const {
+  return kDoubleCid;
+}
+
+
+RawAbstractType* BoxDoubleComp::CompileType() const {
+  return Type::DoubleInterface();
+}
+
+
 RawAbstractType* UnarySmiOpComp::CompileType() const {
   return Type::IntInterface();
 }
@@ -1049,6 +1069,11 @@ RawAbstractType* CheckClassComp::CompileType() const {
 }
 
 
+RawAbstractType* CheckEitherNonSmiComp::CompileType() const {
+  return AbstractType::null();
+}
+
+
 // Shared code generation methods (EmitNativeCode, MakeLocationSummary, and
 // PrepareEntry). Only assembly code that can be shared across all architectures
 // can be used. Machine specific register allocation and code generation
@@ -1530,6 +1555,14 @@ Environment::Environment(const GrowableArray<Definition*>& definitions,
 }
 
 
+Environment::Environment(const GrowableArray<Value*>& values,
+                         intptr_t fixed_parameter_count)
+    : values_(values.length()),
+      locations_(NULL),
+      fixed_parameter_count_(fixed_parameter_count) {
+  values_.AddArray(values);
+}
+
 #undef __
 
 }  // namespace dart