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Issue 10829169: Refactor Math.min/max to be a single HInstruction. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: review feedback; removed VORR instruction Created 8 years, 4 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1490 } else { 1490 } else {
1491 __ add(ToRegister(left), ToOperand(right)); 1491 __ add(ToRegister(left), ToOperand(right));
1492 } 1492 }
1493 1493
1494 if (instr->hydrogen()->CheckFlag(HValue::kCanOverflow)) { 1494 if (instr->hydrogen()->CheckFlag(HValue::kCanOverflow)) {
1495 DeoptimizeIf(overflow, instr->environment()); 1495 DeoptimizeIf(overflow, instr->environment());
1496 } 1496 }
1497 } 1497 }
1498 1498
1499 1499
1500 void LCodeGen::DoMathMinMax(LMathMinMax* instr) {
1501 LOperand* left = instr->InputAt(0);
1502 LOperand* right = instr->InputAt(1);
1503 ASSERT(left->Equals(instr->result()));
1504 HMathMinMax::Operation operation = instr->hydrogen()->operation();
1505 if (instr->hydrogen()->representation().IsInteger32()) {
1506 Label return_left;
1507 Condition condition = (operation == HMathMinMax::kMathMin)
1508 ? less_equal
1509 : greater_equal;
1510 if (right->IsConstantOperand()) {
1511 Operand left_op = ToOperand(left);
1512 Immediate right_imm = ToInteger32Immediate(right);
1513 __ cmp(left_op, right_imm);
1514 __ j(condition, &return_left, Label::kNear);
1515 __ mov(left_op, right_imm);
1516 } else {
1517 Register left_reg = ToRegister(left);
1518 Operand right_op = ToOperand(right);
1519 __ cmp(left_reg, right_op);
1520 __ j(condition, &return_left, Label::kNear);
1521 __ mov(left_reg, right_op);
1522 }
1523 __ bind(&return_left);
1524 } else {
1525 ASSERT(instr->hydrogen()->representation().IsDouble());
1526 Label check_nan_left, check_zero, return_left, return_right;
1527 Condition condition = (operation == HMathMinMax::kMathMin) ? below : above;
1528 XMMRegister left_reg = ToDoubleRegister(left);
1529 XMMRegister right_reg = ToDoubleRegister(right);
1530 __ ucomisd(left_reg, right_reg);
1531 __ j(parity_even, &check_nan_left, Label::kNear); // At least one NaN.
1532 __ j(equal, &check_zero, Label::kNear); // left == right.
1533 __ j(condition, &return_left, Label::kNear);
1534 __ jmp(&return_right, Label::kNear);
1535
1536 __ bind(&check_zero);
1537 XMMRegister xmm_scratch = xmm0;
1538 __ xorps(xmm_scratch, xmm_scratch);
1539 __ ucomisd(left_reg, xmm_scratch);
1540 __ j(not_equal, &return_left, Label::kNear); // left == right != 0.
1541 // At this point, both left and right are either 0 or -0.
1542 if (operation == HMathMinMax::kMathMin) {
1543 __ orpd(left_reg, right_reg);
1544 } else {
1545 // Since we operate on +0 and/or -0, addsd and andsd have the same effect.
1546 __ addsd(left_reg, right_reg);
1547 }
1548 __ jmp(&return_left, Label::kNear);
1549
1550 __ bind(&check_nan_left);
1551 __ ucomisd(left_reg, left_reg); // NaN check.
1552 __ j(parity_even, &return_left, Label::kNear); // left == NaN.
1553 __ bind(&return_right);
1554 __ movsd(left_reg, right_reg);
1555
1556 __ bind(&return_left);
1557 }
1558 }
1559
1560
1500 void LCodeGen::DoArithmeticD(LArithmeticD* instr) { 1561 void LCodeGen::DoArithmeticD(LArithmeticD* instr) {
1501 XMMRegister left = ToDoubleRegister(instr->InputAt(0)); 1562 XMMRegister left = ToDoubleRegister(instr->InputAt(0));
1502 XMMRegister right = ToDoubleRegister(instr->InputAt(1)); 1563 XMMRegister right = ToDoubleRegister(instr->InputAt(1));
1503 XMMRegister result = ToDoubleRegister(instr->result()); 1564 XMMRegister result = ToDoubleRegister(instr->result());
1504 // Modulo uses a fixed result register. 1565 // Modulo uses a fixed result register.
1505 ASSERT(instr->op() == Token::MOD || left.is(result)); 1566 ASSERT(instr->op() == Token::MOD || left.is(result));
1506 switch (instr->op()) { 1567 switch (instr->op()) {
1507 case Token::ADD: 1568 case Token::ADD:
1508 __ addsd(left, right); 1569 __ addsd(left, right);
1509 break; 1570 break;
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5360 FixedArray::kHeaderSize - kPointerSize)); 5421 FixedArray::kHeaderSize - kPointerSize));
5361 __ bind(&done); 5422 __ bind(&done);
5362 } 5423 }
5363 5424
5364 5425
5365 #undef __ 5426 #undef __
5366 5427
5367 } } // namespace v8::internal 5428 } } // namespace v8::internal
5368 5429
5369 #endif // V8_TARGET_ARCH_IA32 5430 #endif // V8_TARGET_ARCH_IA32
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