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Side by Side Diff: src/arm/simulator-arm.h

Issue 10829169: Refactor Math.min/max to be a single HInstruction. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 8 years, 4 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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156 // architecture specification and is off by a 8 from the currently executing 156 // architecture specification and is off by a 8 from the currently executing
157 // instruction. 157 // instruction.
158 void set_register(int reg, int32_t value); 158 void set_register(int reg, int32_t value);
159 int32_t get_register(int reg) const; 159 int32_t get_register(int reg) const;
160 double get_double_from_register_pair(int reg); 160 double get_double_from_register_pair(int reg);
161 void set_dw_register(int dreg, const int* dbl); 161 void set_dw_register(int dreg, const int* dbl);
162 162
163 // Support for VFP. 163 // Support for VFP.
164 void set_s_register(int reg, unsigned int value); 164 void set_s_register(int reg, unsigned int value);
165 unsigned int get_s_register(int reg) const; 165 unsigned int get_s_register(int reg) const;
166 void set_d_register_from_double(int dreg, const double& dbl); 166
167 double get_double_from_d_register(int dreg); 167 void set_d_register_from_double(int dreg, const double& dbl) {
168 void set_s_register_from_float(int sreg, const float dbl); 168 SetVFPRegister<double, 2>(dreg, dbl);
169 float get_float_from_s_register(int sreg); 169 }
170 void set_s_register_from_sinteger(int reg, const int value); 170
171 int get_sinteger_from_s_register(int reg); 171 double get_double_from_d_register(int dreg) {
172 return GetFromVFPRegister<double, 2>(dreg);
173 }
174
175 void set_d_register_from_raw_bits(int dreg, const int64_t bits) {
176 SetVFPRegister<int64_t, 2>(dreg, bits);
177 }
178
179 int64_t get_raw_bits_from_d_register(int dreg) {
180 return GetFromVFPRegister<int64_t, 2>(dreg);
181 }
182
183 void set_s_register_from_float(int sreg, const float flt) {
184 SetVFPRegister<float, 1>(sreg, flt);
185 }
186
187 float get_float_from_s_register(int sreg) {
188 return GetFromVFPRegister<float, 1>(sreg);
189 }
190
191 void set_s_register_from_sinteger(int sreg, const int sint) {
192 SetVFPRegister<int, 1>(sreg, sint);
193 }
194
195 int get_sinteger_from_s_register(int sreg) {
196 return GetFromVFPRegister<int, 1>(sreg);
197 }
172 198
173 // Special case of set_register and get_register to access the raw PC value. 199 // Special case of set_register and get_register to access the raw PC value.
174 void set_pc(int32_t value); 200 void set_pc(int32_t value);
175 int32_t get_pc() const; 201 int32_t get_pc() const;
176 202
177 // Accessor to the internal simulator stack area. 203 // Accessor to the internal simulator stack area.
178 uintptr_t StackLimit() const; 204 uintptr_t StackLimit() const;
179 205
180 // Executes ARM instructions until the PC reaches end_sim_pc. 206 // Executes ARM instructions until the PC reaches end_sim_pc.
181 void Execute(); 207 void Execute();
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295 // Executing is handled based on the instruction type. 321 // Executing is handled based on the instruction type.
296 // Both type 0 and type 1 rolled into one. 322 // Both type 0 and type 1 rolled into one.
297 void DecodeType01(Instruction* instr); 323 void DecodeType01(Instruction* instr);
298 void DecodeType2(Instruction* instr); 324 void DecodeType2(Instruction* instr);
299 void DecodeType3(Instruction* instr); 325 void DecodeType3(Instruction* instr);
300 void DecodeType4(Instruction* instr); 326 void DecodeType4(Instruction* instr);
301 void DecodeType5(Instruction* instr); 327 void DecodeType5(Instruction* instr);
302 void DecodeType6(Instruction* instr); 328 void DecodeType6(Instruction* instr);
303 void DecodeType7(Instruction* instr); 329 void DecodeType7(Instruction* instr);
304 330
331 void DecodeSpecialCondition(Instruction* instr);
332
305 // Support for VFP. 333 // Support for VFP.
306 void DecodeTypeVFP(Instruction* instr); 334 void DecodeTypeVFP(Instruction* instr);
307 void DecodeType6CoprocessorIns(Instruction* instr); 335 void DecodeType6CoprocessorIns(Instruction* instr);
308 336
309 void DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(Instruction* instr); 337 void DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(Instruction* instr);
310 void DecodeVCMP(Instruction* instr); 338 void DecodeVCMP(Instruction* instr);
311 void DecodeVCVTBetweenDoubleAndSingle(Instruction* instr); 339 void DecodeVCVTBetweenDoubleAndSingle(Instruction* instr);
312 void DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr); 340 void DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr);
313 341
314 // Executes one instruction. 342 // Executes one instruction.
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325 void* external_function, 353 void* external_function,
326 v8::internal::ExternalReference::Type type); 354 v8::internal::ExternalReference::Type type);
327 355
328 // For use in calls that take double value arguments. 356 // For use in calls that take double value arguments.
329 void GetFpArgs(double* x, double* y); 357 void GetFpArgs(double* x, double* y);
330 void GetFpArgs(double* x); 358 void GetFpArgs(double* x);
331 void GetFpArgs(double* x, int32_t* y); 359 void GetFpArgs(double* x, int32_t* y);
332 void SetFpResult(const double& result); 360 void SetFpResult(const double& result);
333 void TrashCallerSaveRegisters(); 361 void TrashCallerSaveRegisters();
334 362
363 template<class ReturnType, int register_size>
364 ReturnType GetFromVFPRegister(int reg_index);
365
366 template<class InputType, int register_size>
367 void SetVFPRegister(int reg_index, const InputType& value);
368
335 // Architecture state. 369 // Architecture state.
336 // Saturating instructions require a Q flag to indicate saturation. 370 // Saturating instructions require a Q flag to indicate saturation.
337 // There is currently no way to read the CPSR directly, and thus read the Q 371 // There is currently no way to read the CPSR directly, and thus read the Q
338 // flag, so this is left unimplemented. 372 // flag, so this is left unimplemented.
339 int32_t registers_[16]; 373 int32_t registers_[16];
340 bool n_flag_; 374 bool n_flag_;
341 bool z_flag_; 375 bool z_flag_;
342 bool c_flag_; 376 bool c_flag_;
343 bool v_flag_; 377 bool v_flag_;
344 378
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429 463
430 static inline void UnregisterCTryCatch() { 464 static inline void UnregisterCTryCatch() {
431 Simulator::current(Isolate::Current())->PopAddress(); 465 Simulator::current(Isolate::Current())->PopAddress();
432 } 466 }
433 }; 467 };
434 468
435 } } // namespace v8::internal 469 } } // namespace v8::internal
436 470
437 #endif // !defined(USE_SIMULATOR) 471 #endif // !defined(USE_SIMULATOR)
438 #endif // V8_ARM_SIMULATOR_ARM_H_ 472 #endif // V8_ARM_SIMULATOR_ARM_H_
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