Add support for fixed parameters in the register allocator.

runtime/vm/intermediate_language.cc

 // Copyright (c) 2012, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/intermediate_language.h"
 
 #include "vm/bit_vector.h"
 #include "vm/dart_entry.h"
 #include "vm/flow_graph_builder.h"
 #include "vm/flow_graph_compiler.h"
@@ skipping 78 matching lines @@
   prev->set_next(next);
   next->set_previous(prev);
   // Reset successor and previous instruction to indicate
   // that the instruction is removed from the graph.
   current_->set_previous(NULL);
   current_->set_next(NULL);
   current_ = prev;
 }
 
 
-// True iff. the v2 is above v1 on stack, or one of them is constant.
-static bool VerifyValues(Value* v1, Value* v2) {
-  ASSERT(v1->IsUse() && v2->IsUse());
-  return (v1->AsUse()->definition()->temp_index() + 1) ==
-     v2->AsUse()->definition()->temp_index();
-}
-
-
 // Default implementation of visiting basic blocks.  Can be overridden.
 void FlowGraphVisitor::VisitBlocks() {
   for (intptr_t i = 0; i < block_order_.length(); ++i) {
     BlockEntryInstr* entry = block_order_[i];
     entry->Accept(this);
     for (ForwardInstructionIterator it(entry); !it.Done(); it.Advance()) {
       it.Current()->Accept(this);
     }
   }
 }
@@ skipping 268 matching lines @@
 
 intptr_t JoinEntryInstr::IndexOfPredecessor(BlockEntryInstr* pred) const {
   for (intptr_t i = 0; i < predecessors_.length(); ++i) {
     if (predecessors_[i] == pred) return i;
   }
   return -1;
 }
 
 
 // ==== Recording assigned variables.
-void Computation::RecordAssignedVars(BitVector* assigned_vars) {
+void Computation::RecordAssignedVars(BitVector* assigned_vars,
+                                     intptr_t fixed_param_count) {
   // Nothing to do for the base class.
 }
 
 
-void StoreLocalComp::RecordAssignedVars(BitVector* assigned_vars) {
+void StoreLocalComp::RecordAssignedVars(BitVector* assigned_vars,
+                                        intptr_t fixed_param_count) {
   if (!local().is_captured()) {
-    assigned_vars->Add(local().BitIndexIn(assigned_vars->length()));
+    assigned_vars->Add(local().BitIndexIn(fixed_param_count));
   }
 }
 
 
-void Instruction::RecordAssignedVars(BitVector* assigned_vars) {
+void Instruction::RecordAssignedVars(BitVector* assigned_vars,
+                                     intptr_t fixed_param_count) {
   // Nothing to do for the base class.
 }
 
 
-void BindInstr::RecordAssignedVars(BitVector* assigned_vars) {
-  computation()->RecordAssignedVars(assigned_vars);
+void BindInstr::RecordAssignedVars(BitVector* assigned_vars,
+                                   intptr_t fixed_param_count) {
+  computation()->RecordAssignedVars(assigned_vars, fixed_param_count);
 }
 
 
 // ==== Postorder graph traversal.
 void GraphEntryInstr::DiscoverBlocks(
     BlockEntryInstr* current_block,
     GrowableArray<BlockEntryInstr*>* preorder,
     GrowableArray<BlockEntryInstr*>* postorder,
     GrowableArray<intptr_t>* parent,
     GrowableArray<BitVector*>* assigned_vars,
-    intptr_t variable_count) {
+    intptr_t variable_count,
+    intptr_t fixed_param_count) {
   // We only visit this block once, first of all blocks.
   ASSERT(preorder_number() == -1);
   ASSERT(current_block == NULL);
   ASSERT(preorder->is_empty());
   ASSERT(postorder->is_empty());
   ASSERT(parent->is_empty());
 
   // This node has no parent, indicated by -1.  The preorder number is 0.
   parent->Add(-1);
   set_preorder_number(0);
   preorder->Add(this);
   BitVector* vars =
       (variable_count == 0) ? NULL : new BitVector(variable_count);
   assigned_vars->Add(vars);
 
   // The graph entry consists of only one instruction.
   set_last_instruction(this);
 
   // Iteratively traverse all successors.  In the unoptimized code, we will
   // enter the function at the first successor in reverse postorder, so we
   // must visit the normal entry last.
   for (intptr_t i = catch_entries_.length() - 1; i >= 0; --i) {
     catch_entries_[i]->DiscoverBlocks(this, preorder, postorder,
-                                      parent, assigned_vars, variable_count);
+                                      parent, assigned_vars,
+                                      variable_count, fixed_param_count);
   }
   normal_entry_->DiscoverBlocks(this, preorder, postorder,
-                                parent, assigned_vars, variable_count);
+                                parent, assigned_vars,
+                                variable_count, fixed_param_count);
 
   // Assign postorder number.
   set_postorder_number(postorder->length());
   postorder->Add(this);
 }
 
 
 // Base class implementation used for JoinEntry and TargetEntry.
 void BlockEntryInstr::DiscoverBlocks(
     BlockEntryInstr* current_block,
     GrowableArray<BlockEntryInstr*>* preorder,
     GrowableArray<BlockEntryInstr*>* postorder,
     GrowableArray<intptr_t>* parent,
     GrowableArray<BitVector*>* assigned_vars,
-    intptr_t variable_count) {
+    intptr_t variable_count,
+    intptr_t fixed_param_count) {
   // We have already visited the graph entry, so we can assume current_block
   // is non-null and preorder array is non-empty.
   ASSERT(current_block != NULL);
   ASSERT(!preorder->is_empty());
 
   // 1. Record control-flow-graph basic-block predecessors.
   AddPredecessor(current_block);
 
   // 2. If the block has already been reached by the traversal, we are
   // done.  Blocks with a single predecessor cannot have been reached
@@ skipping 19 matching lines @@
   // 5. Iterate straight-line successors until a branch instruction or
   // another basic block entry instruction, and visit that instruction.
   ASSERT(next() != NULL);
   Instruction* next_instr = next();
   if (next_instr->IsBlockEntry()) {
     set_last_instruction(this);
   } else {
     while ((next_instr != NULL) &&
            !next_instr->IsBlockEntry() &&
            !next_instr->IsBranch()) {
-      if (vars != NULL) next_instr->RecordAssignedVars(vars);
+      if (vars != NULL) next_instr->RecordAssignedVars(vars, fixed_param_count);
       set_last_instruction(next_instr);
       GotoInstr* goto_instr = next_instr->AsGoto();
       next_instr =
           (goto_instr != NULL) ? goto_instr->successor() : next_instr->next();
     }
   }
   if (next_instr != NULL) {
     next_instr->DiscoverBlocks(this, preorder, postorder,
-                               parent, assigned_vars, variable_count);
+                               parent, assigned_vars,
+                               variable_count, fixed_param_count);
   }
 
   // 6. Assign postorder number and add the block entry to the list.
   set_postorder_number(postorder->length());
   postorder->Add(this);
 }
 
 
 void BranchInstr::DiscoverBlocks(
     BlockEntryInstr* current_block,
     GrowableArray<BlockEntryInstr*>* preorder,
     GrowableArray<BlockEntryInstr*>* postorder,
     GrowableArray<intptr_t>* parent,
     GrowableArray<BitVector*>* assigned_vars,
-    intptr_t variable_count) {
+    intptr_t variable_count,
+    intptr_t fixed_param_count) {
   current_block->set_last_instruction(this);
   // Visit the false successor before the true successor so they appear in
   // true/false order in reverse postorder used as the block ordering in the
   // nonoptimizing compiler.
   ASSERT(true_successor_ != NULL);
   ASSERT(false_successor_ != NULL);
   false_successor_->DiscoverBlocks(current_block, preorder, postorder,
-                                   parent, assigned_vars, variable_count);
+                                   parent, assigned_vars,
+                                   variable_count, fixed_param_count);
   true_successor_->DiscoverBlocks(current_block, preorder, postorder,
-                                  parent, assigned_vars, variable_count);
+                                  parent, assigned_vars,
+                                  variable_count, fixed_param_count);
 }
 
 
 void JoinEntryInstr::InsertPhi(intptr_t var_index, intptr_t var_count) {
   // Lazily initialize the array of phis.
   // Currently, phis are stored in a sparse array that holds the phi
   // for variable with index i at position i.
   // TODO(fschneider): Store phis in a more compact way.
   if (phis_ == NULL) {
     phis_ = new ZoneGrowableArray<PhiInstr*>(var_count);
@@ skipping 398 matching lines @@
   summary->set_in(0, Location::RequiresRegister());
   summary->set_in(1, Location::RequiresRegister());
   if (HasICData()) {
     summary->set_temp(0, Location::RequiresRegister());
   }
   return summary;
 }
 
 
 void StoreInstanceFieldComp::EmitNativeCode(FlowGraphCompiler* compiler) {
-  ASSERT(VerifyValues(instance(), value()));

[srdjan, 2012/07/26 00:33:56]

Why remove this?

[Vyacheslav Egorov (Google), 2012/07/26 11:33:53]

Because it does not work for SSA form with phis.

   Register instance_reg = locs()->in(0).reg();
   Register value_reg = locs()->in(1).reg();
 
   if (HasICData()) {
     ASSERT(original() != NULL);
     Label* deopt = compiler->AddDeoptStub(original()->cid(),
                                           original()->token_pos(),
                                           original()->try_index(),
                                           kDeoptInstanceGetterSameTarget,
                                           instance_reg,
@@ skipping 330 matching lines @@
   const ExternalLabel label(closure_function.ToCString(), stub.EntryPoint());
   compiler->GenerateCall(token_pos(), try_index(), &label,
                          PcDescriptors::kOther);
   __ Drop(2);  // Discard type arguments and receiver.
 }
 
 
 #undef __
 
 }  // namespace dart