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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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417 explicit Operand(Register rm, ShiftOp shift_op, Register rs); | 417 explicit Operand(Register rm, ShiftOp shift_op, Register rs); |
418 | 418 |
419 // Return true if this is a register operand. | 419 // Return true if this is a register operand. |
420 INLINE(bool is_reg() const); | 420 INLINE(bool is_reg() const); |
421 | 421 |
422 // Return true if this operand fits in one instruction so that no | 422 // Return true if this operand fits in one instruction so that no |
423 // 2-instruction solution with a load into the ip register is necessary. If | 423 // 2-instruction solution with a load into the ip register is necessary. If |
424 // the instruction this operand is used for is a MOV or MVN instruction the | 424 // the instruction this operand is used for is a MOV or MVN instruction the |
425 // actual instruction to use is required for this calculation. For other | 425 // actual instruction to use is required for this calculation. For other |
426 // instructions instr is ignored. | 426 // instructions instr is ignored. |
427 bool is_single_instruction(Instr instr = 0) const; | 427 bool is_single_instruction(const Assembler* assembler, Instr instr = 0) const; |
428 bool must_use_constant_pool() const; | 428 bool must_use_constant_pool(const Assembler* assembler) const; |
429 | 429 |
430 inline int32_t immediate() const { | 430 inline int32_t immediate() const { |
431 ASSERT(!rm_.is_valid()); | 431 ASSERT(!rm_.is_valid()); |
432 return imm32_; | 432 return imm32_; |
433 } | 433 } |
434 | 434 |
435 Register rm() const { return rm_; } | 435 Register rm() const { return rm_; } |
436 Register rs() const { return rs_; } | 436 Register rs() const { return rs_; } |
437 ShiftOp shift_op() const { return shift_op_; } | 437 ShiftOp shift_op() const { return shift_op_; } |
438 | 438 |
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641 // If the provided buffer is not NULL, the assembler uses the provided buffer | 641 // If the provided buffer is not NULL, the assembler uses the provided buffer |
642 // for code generation and assumes its size to be buffer_size. If the buffer | 642 // for code generation and assumes its size to be buffer_size. If the buffer |
643 // is too small, a fatal error occurs. No deallocation of the buffer is done | 643 // is too small, a fatal error occurs. No deallocation of the buffer is done |
644 // upon destruction of the assembler. | 644 // upon destruction of the assembler. |
645 Assembler(Isolate* isolate, void* buffer, int buffer_size); | 645 Assembler(Isolate* isolate, void* buffer, int buffer_size); |
646 ~Assembler(); | 646 ~Assembler(); |
647 | 647 |
648 // Overrides the default provided by FLAG_debug_code. | 648 // Overrides the default provided by FLAG_debug_code. |
649 void set_emit_debug_code(bool value) { emit_debug_code_ = value; } | 649 void set_emit_debug_code(bool value) { emit_debug_code_ = value; } |
650 | 650 |
651 // Dummy for cross platform compatibility. | 651 // Avoids using instructions that vary in size in unpredictable ways between |
652 void set_predictable_code_size(bool value) { } | 652 // the snapshot and the running VM. This is needed by the full compiler so |
| 653 // that it can recompile code with debug support and fix the PC. |
| 654 void set_predictable_code_size(bool value) { predictable_code_size_ = value; } |
653 | 655 |
654 // GetCode emits any pending (non-emitted) code and fills the descriptor | 656 // GetCode emits any pending (non-emitted) code and fills the descriptor |
655 // desc. GetCode() is idempotent; it returns the same result if no other | 657 // desc. GetCode() is idempotent; it returns the same result if no other |
656 // Assembler functions are invoked in between GetCode() calls. | 658 // Assembler functions are invoked in between GetCode() calls. |
657 void GetCode(CodeDesc* desc); | 659 void GetCode(CodeDesc* desc); |
658 | 660 |
659 // Label operations & relative jumps (PPUM Appendix D) | 661 // Label operations & relative jumps (PPUM Appendix D) |
660 // | 662 // |
661 // Takes a branch opcode (cc) and a label (L) and generates | 663 // Takes a branch opcode (cc) and a label (L) and generates |
662 // either a backward branch or a forward branch and links it | 664 // either a backward branch or a forward branch and links it |
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1163 ldr(dst, MemOperand(sp, 4, PostIndex), cond); | 1165 ldr(dst, MemOperand(sp, 4, PostIndex), cond); |
1164 } | 1166 } |
1165 | 1167 |
1166 void pop() { | 1168 void pop() { |
1167 add(sp, sp, Operand(kPointerSize)); | 1169 add(sp, sp, Operand(kPointerSize)); |
1168 } | 1170 } |
1169 | 1171 |
1170 // Jump unconditionally to given label. | 1172 // Jump unconditionally to given label. |
1171 void jmp(Label* L) { b(L, al); } | 1173 void jmp(Label* L) { b(L, al); } |
1172 | 1174 |
| 1175 bool predictable_code_size() const { return predictable_code_size_; } |
| 1176 |
1173 // Check the code size generated from label to here. | 1177 // Check the code size generated from label to here. |
1174 int SizeOfCodeGeneratedSince(Label* label) { | 1178 int SizeOfCodeGeneratedSince(Label* label) { |
1175 return pc_offset() - label->pos(); | 1179 return pc_offset() - label->pos(); |
1176 } | 1180 } |
1177 | 1181 |
1178 // Check the number of instructions generated from label to here. | 1182 // Check the number of instructions generated from label to here. |
1179 int InstructionsGeneratedSince(Label* label) { | 1183 int InstructionsGeneratedSince(Label* label) { |
1180 return SizeOfCodeGeneratedSince(label) / kInstrSize; | 1184 return SizeOfCodeGeneratedSince(label) / kInstrSize; |
1181 } | 1185 } |
1182 | 1186 |
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1443 | 1447 |
1444 // Record reloc info for current pc_ | 1448 // Record reloc info for current pc_ |
1445 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0); | 1449 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0); |
1446 | 1450 |
1447 friend class RegExpMacroAssemblerARM; | 1451 friend class RegExpMacroAssemblerARM; |
1448 friend class RelocInfo; | 1452 friend class RelocInfo; |
1449 friend class CodePatcher; | 1453 friend class CodePatcher; |
1450 friend class BlockConstPoolScope; | 1454 friend class BlockConstPoolScope; |
1451 | 1455 |
1452 PositionsRecorder positions_recorder_; | 1456 PositionsRecorder positions_recorder_; |
| 1457 |
1453 bool emit_debug_code_; | 1458 bool emit_debug_code_; |
| 1459 bool predictable_code_size_; |
| 1460 |
1454 friend class PositionsRecorder; | 1461 friend class PositionsRecorder; |
1455 friend class EnsureSpace; | 1462 friend class EnsureSpace; |
1456 }; | 1463 }; |
1457 | 1464 |
1458 | 1465 |
1459 class EnsureSpace BASE_EMBEDDED { | 1466 class EnsureSpace BASE_EMBEDDED { |
1460 public: | 1467 public: |
1461 explicit EnsureSpace(Assembler* assembler) { | 1468 explicit EnsureSpace(Assembler* assembler) { |
1462 assembler->CheckBuffer(); | 1469 assembler->CheckBuffer(); |
1463 } | 1470 } |
1464 }; | 1471 }; |
1465 | 1472 |
1466 | 1473 |
1467 } } // namespace v8::internal | 1474 } } // namespace v8::internal |
1468 | 1475 |
1469 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1476 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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