Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(908)

Side by Side Diff: runtime/vm/assembler_x64.cc

Issue 10805053: Add spill slot locations. (Closed) Base URL: https://dart.googlecode.com/svn/branches/bleeding_edge/dart
Patch Set: Created 8 years, 5 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
OLDNEW
1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_X64) 6 #if defined(TARGET_ARCH_X64)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/heap.h" 9 #include "vm/heap.h"
10 #include "vm/memory_region.h" 10 #include "vm/memory_region.h"
(...skipping 910 matching lines...) Expand 10 before | Expand all | Expand 10 after
921 921
922 922
923 void Assembler::xorq(Register dst, const Address& address) { 923 void Assembler::xorq(Register dst, const Address& address) {
924 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 924 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
925 EmitOperandREX(dst, address, REX_W); 925 EmitOperandREX(dst, address, REX_W);
926 EmitUint8(0x33); 926 EmitUint8(0x33);
927 EmitOperand(dst & 7, address); 927 EmitOperand(dst & 7, address);
928 } 928 }
929 929
930 930
931 void Assembler::xorq(const Address& dst, Register src) {
932 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
933 EmitOperandREX(src, dst, REX_W);
934 EmitUint8(0x31);
935 EmitOperand(src & 7, dst);
936 }
937
938
931 void Assembler::addl(Register dst, Register src) { 939 void Assembler::addl(Register dst, Register src) {
932 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 940 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
933 Operand operand(src); 941 Operand operand(src);
934 EmitOperandREX(dst, operand, REX_NONE); 942 EmitOperandREX(dst, operand, REX_NONE);
935 EmitUint8(0x03); 943 EmitUint8(0x03);
936 EmitOperand(dst & 7, operand); 944 EmitOperand(dst & 7, operand);
937 } 945 }
938 946
939 947
940 void Assembler::addq(Register dst, Register src) { 948 void Assembler::addq(Register dst, Register src) {
(...skipping 553 matching lines...) Expand 10 before | Expand all | Expand 10 after
1494 } else { 1502 } else {
1495 ASSERT(object.IsZoneHandle()); 1503 ASSERT(object.IsZoneHandle());
1496 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1504 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1497 EmitRegisterREX(dst, REX_W); 1505 EmitRegisterREX(dst, REX_W);
1498 EmitUint8(0xB8 | (dst & 7)); 1506 EmitUint8(0xB8 | (dst & 7));
1499 buffer_.EmitObject(object); 1507 buffer_.EmitObject(object);
1500 } 1508 }
1501 } 1509 }
1502 1510
1503 1511
1512 void Assembler::StoreObject(const Address& dst, const Object& object) {
1513 LoadObject(TMP, object);
1514 movq(dst, TMP);
srdjan 2012/07/23 16:18:59 The code can be better for Smi.
1515 }
1516
1517
1504 void Assembler::PushObject(const Object& object) { 1518 void Assembler::PushObject(const Object& object) {
1505 if (object.IsSmi()) { 1519 if (object.IsSmi()) {
1506 pushq(Immediate(reinterpret_cast<int64_t>(object.raw()))); 1520 pushq(Immediate(reinterpret_cast<int64_t>(object.raw())));
1507 } else { 1521 } else {
1508 LoadObject(TMP, object); 1522 LoadObject(TMP, object);
1509 pushq(TMP); 1523 pushq(TMP);
1510 } 1524 }
1511 } 1525 }
1512 1526
1513 1527
(...skipping 379 matching lines...) Expand 10 before | Expand all | Expand 10 after
1893 1907
1894 const char* Assembler::RegisterName(Register reg) { 1908 const char* Assembler::RegisterName(Register reg) {
1895 ASSERT((0 <= reg) && (reg < kNumberOfCpuRegisters)); 1909 ASSERT((0 <= reg) && (reg < kNumberOfCpuRegisters));
1896 return cpu_reg_names[reg]; 1910 return cpu_reg_names[reg];
1897 } 1911 }
1898 1912
1899 1913
1900 } // namespace dart 1914 } // namespace dart
1901 1915
1902 #endif // defined TARGET_ARCH_X64 1916 #endif // defined TARGET_ARCH_X64
OLDNEW

Powered by Google App Engine
This is Rietveld 408576698