Allow uint32 value on optimized frames if they are consumed by safe operations.

src/lithium.h

Index: src/lithium.h
diff --git a/src/lithium.h b/src/lithium.h
index d0d1b23e7287c71e42ce4e5a4f7f222f2f59d3c1..923a1594c9d1b07603190c94565985a1d9a335a2 100644
--- a/src/lithium.h
+++ b/src/lithium.h
@@ -471,6 +471,7 @@ class LEnvironment: public ZoneObject {
         pc_offset_(-1),
         values_(value_count, zone),
         is_tagged_(value_count, zone),
+        is_uint32_(value_count, zone),
         spilled_registers_(NULL),
         spilled_double_registers_(NULL),
         outer_(outer),
@@ -491,17 +492,28 @@ class LEnvironment: public ZoneObject {
   const ZoneList<LOperand*>* values() const { return &values_; }
   LEnvironment* outer() const { return outer_; }
 
-  void AddValue(LOperand* operand, Representation representation) {
+  void AddValue(LOperand* operand,
+                Representation representation,
+                bool is_uint32) {
     values_.Add(operand, zone());
     if (representation.IsTagged()) {
+      ASSERT(!is_uint32);
       is_tagged_.Add(values_.length() - 1);
     }
+
+    if (is_uint32) {
+      is_uint32_.Add(values_.length() - 1);
+    }
   }
 
   bool HasTaggedValueAt(int index) const {
     return is_tagged_.Contains(index);
   }
 
+  bool HasUint32ValueAt(int index) const {
+    return is_uint32_.Contains(index);
+  }
+
   void Register(int deoptimization_index,
                 int translation_index,
                 int pc_offset) {
@@ -535,6 +547,7 @@ class LEnvironment: public ZoneObject {
   int pc_offset_;
   ZoneList<LOperand*> values_;
   BitVector is_tagged_;
+  BitVector is_uint32_;
 
   // Allocation index indexed arrays of spill slot operands for registers
   // that are also in spill slots at an OSR entry.  NULL for environments