Cleanups.

runtime/vm/flow_graph_allocator.cc

 // Copyright (c) 2012, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/flow_graph_allocator.h"
 
 #include "vm/bit_vector.h"
 #include "vm/intermediate_language.h"
 #include "vm/flow_graph_compiler.h"
 
@@ skipping 11 matching lines @@
     postorder_(postorder),
     vreg_count_(max_ssa_temp_index) {
 }
 
 
 void FlowGraphAllocator::ResolveConstraints() {
   // TODO(fschneider): Resolve register constraints.
 }
 
 
-static intptr_t ToVirtualRegister(Instruction* instr) {
-  const Definition* def = instr->AsDefinition();
-  return (def == NULL) ? -1 : def->ssa_temp_index();
-}
-
-
 void FlowGraphAllocator::ComputeInitialSets() {
   const intptr_t block_count = postorder_.length();
   for (intptr_t i = 0; i < block_count; i++) {
     BlockEntryInstr* block = postorder_[i];
 
     BitVector* kill = kill_[i];
     BitVector* live_in = live_in_[i];
 
     if (block->IsJoinEntry()) {
       JoinEntryInstr* join = block->AsJoinEntry();
       if (join->phis() != NULL) {
         for (intptr_t j = 0; j < join->phis()->length(); j++) {
           PhiInstr* phi = (*join->phis())[j];
           if (phi == NULL) continue;
-
-          const intptr_t def = ToVirtualRegister(phi);
-          if (def >= 0) kill->Add(def);
+          kill->Add(phi->ssa_temp_index());
 
           for (intptr_t k = 0; k < phi->InputCount(); k++) {
             Value* val = phi->InputAt(k);
-            if (!val->IsUse()) continue;
-            const intptr_t use = ToVirtualRegister(val->AsUse()->definition());
-            if (use >= 0) {
+            if (val->IsUse()) {
               BlockEntryInstr* pred = block->PredecessorAt(k);
+              const intptr_t use = val->AsUse()->definition()->ssa_temp_index();
               live_out_[pred->postorder_number()]->Add(use);
             }
           }
         }
       }
     }
 
     // TODO(vegorov): iterate backwards.
     for (ForwardInstructionIterator it(block); !it.Done(); it.Advance()) {
       Instruction* current = it.Current();
       for (intptr_t j = 0; j < current->InputCount(); j++) {
         Value* input = current->InputAt(j);
-        if (!input->IsUse()) continue;
-        const intptr_t use = ToVirtualRegister(input->AsUse()->definition());
-        if ((use >= 0) && !kill->Contains(use)) live_in->Add(use);
+        if (input->IsUse()) {
+          const intptr_t use = input->AsUse()->definition()->ssa_temp_index();
+          if (!kill->Contains(use)) live_in->Add(use);
+        }
       }
 
-      const intptr_t def = ToVirtualRegister(current);
-      if (def >= 0) kill->Add(def);
+      Definition* current_def = current->AsDefinition();
+      if ((current_def != NULL) && (current_def->ssa_temp_index() >= 0)) {
+        kill->Add(current_def->ssa_temp_index());
+      }
     }
   }
 
   // Update initial live_in sets to match live_out sets. Has to be
   // done in a separate path because of backwards branches.
   for (intptr_t i = 0; i < block_count; i++) {
     UpdateLiveIn(postorder_[i]);
   }
 }
 
@@ skipping 83 matching lines @@
     OS::Print("\n");
 
     PrintBitVector("  live out", live_out_[i]);
     PrintBitVector("  kill", kill_[i]);
     PrintBitVector("  live in", live_in_[i]);
   }
 }
 
 
 }  // namespace dart