[MIPS] Add support for debug stub test

tests/debug_stub/debugger_test.c

Index: tests/debug_stub/debugger_test.c
diff --git a/tests/debug_stub/debugger_test.c b/tests/debug_stub/debugger_test.c
index 251491a5e2f6133ab2ed09eb7f7dfa7f1bb48c16..3de800437604ab528bded8908ab4a64f8e866c6a 100644
--- a/tests/debug_stub/debugger_test.c
+++ b/tests/debug_stub/debugger_test.c
@@ -37,6 +37,11 @@ __asm__(".pushsection .text, \"ax\", %progbits\n"
         "fault_addr:\n"
         ".word " NACL_TO_STRING(NACL_INSTR_ARM_BREAKPOINT) "\n"
         ".popsection\n");
+#elif defined(__mips__)
+__asm__(".pushsection .text, \"ax\", %progbits\n"
+        "fault_addr:\n"
+        ".word 0x0000000d\n" /* Break instruction on MIPS. */
+        ".popsection\n");
 #else
 # error Update fault_addr for other architectures
 #endif
@@ -100,6 +105,36 @@ void set_registers_and_stop(void) {
   regs.stack_ptr = 0x12345678;
   regs.lr = 0xe000000f;
   regs.cpsr = (1 << 29) | (1 << 27); /* C and Q flags */
+#elif defined(__mips__)
+  /* Skip zero register because it cannot be set. */
+  regs.at = 0x11000220;
+  regs.v0 = 0x22000330;
+  regs.v1 = 0x33000440;
+  regs.a0 = 0x44000550;
+  regs.a1 = 0x55000660;
+  regs.a2 = 0x66000770;
+  regs.a3 = 0x77000880;
+  regs.t0 = 0x88000990;
+  regs.t1 = 0x99000aa0;
+  regs.t2 = 0xaa000bb0;
+  regs.t3 = 0xbb000cc0;
+  regs.t4 = 0xcc000dd0;
+  regs.t5 = 0xdd000ee0;
+  /* Skip t6, t7 and t8, because they cannot be set by untrusted code. */
+  regs.s0 = 0x11100222;
+  regs.s1 = 0x22200333;
+  regs.s2 = 0x33300444;
+  regs.s3 = 0x44400555;
+  regs.s4 = 0x55500666;
+  regs.s5 = 0x66600777;
+  regs.s6 = 0x77700888;
+  regs.s7 = 0x88800999;
+  regs.t9 = 0xaaa00bbb;
+  /* Skip k0 and k1 registers, since they can be changed by kernel. */
+  regs.global_ptr = 0xddd00eee;
+  regs.stack_ptr = 0x2ee00fff;
+  regs.frame_ptr = 0xfff00000;
+  regs.return_addr = 0x0a0a0a0a;
 #else
 # error Update set_registers_and_stop for other architectures
 #endif
@@ -156,8 +191,8 @@ void test_single_step(void) {
       ".byte 0x48, 0x83, 0xeb, 0x01\n"              /* sub  $0x1,%rbx */
       ".byte 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00\n"  /* nopw 0x0(%rax,%rax,1) */
       ".byte 0x5b\n");                              /* pop  %rbx */
-#elif defined(__arm__)
-  printf("Single-stepping is not supported on ARM\n");
+#elif defined(__arm__) || defined(__mips__)
+  printf("Single-stepping is not supported on ARM and MIPS.\n");
   exit(1);
 #else
 # error Update test_single_step for other architectures
@@ -189,6 +224,10 @@ void breakpoint(void) {
   __asm__(".p2align 4\n"
           ".word " NACL_TO_STRING(NACL_INSTR_ARM_BREAKPOINT) "\n"
           ".p2align 4\n");
+#elif defined(__mips__)
+  __asm__(".p2align 4\n"
+          ".word 0x0000000d\n" /* Break instruction on MIPS. */
+          ".p2align 4\n");
 #else
 # error Unsupported architecture
 #endif