[MIPS] Add support for debug stub test

tests/debug_stub/debugger_test.c

 /*
  * Copyright (c) 2012 The Native Client Authors. All rights reserved.
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
 
 #include <pthread.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
@@ skipping 19 matching lines @@
 #if defined(__i386__) || defined(__x86_64__)
 __asm__(".pushsection .text, \"ax\", @progbits\n"
         "fault_addr:\n"
         "hlt\n"
         ".popsection\n");
 #elif defined(__arm__)
 __asm__(".pushsection .text, \"ax\", %progbits\n"
         "fault_addr:\n"
         ".word " NACL_TO_STRING(NACL_INSTR_ARM_BREAKPOINT) "\n"
         ".popsection\n");
+#elif defined(__mips__)
+__asm__(".pushsection .text, \"ax\", %progbits\n"
+        "fault_addr:\n"
+        ".word 0x0000000d\n"

[Mark Seaborn, 2013/12/26 17:01:13]

Can you comment the instruction that this encodes?

[petarj, 2013/12/26 18:36:24]

Done.

+        ".popsection\n");
 #else
 # error Update fault_addr for other architectures
 #endif
 
 void set_registers_and_stop(void) {
   struct NaClSignalContext regs;
   memset(&regs, 0, sizeof(regs));
 
   /*
    * We set most registers to fixed values before faulting, so that we
@@ skipping 43 matching lines @@
    * Skip r9 because it is not supposed to be settable or readable by
    * untrusted code.
    */
   regs.r10 = 0xa000000b;
   regs.r11 = 0xb000000c;
   regs.r12 = 0xc000000d;
   /* stack_ptr's test value must be within the sandbox address space. */
   regs.stack_ptr = 0x12345678;
   regs.lr = 0xe000000f;
   regs.cpsr = (1 << 29) | (1 << 27); /* C and Q flags */
+#elif defined(__mips__)
+  /* Skip zero register because it can not be set. */
+  regs.at = 0x11000220;
+  regs.v0 = 0x22000330;
+  regs.v1 = 0x33000440;
+  regs.a0 = 0x44000550;
+  regs.a1 = 0x55000660;
+  regs.a2 = 0x66000770;
+  regs.a3 = 0x77000880;
+  regs.t0 = 0x88000990;
+  regs.t1 = 0x99000AA0;
+  regs.t2 = 0xAA000BB0;
+  regs.t3 = 0xBB000CC0;
+  regs.t4 = 0xCC000DD0;
+  regs.t5 = 0xDD000EE0;
+  /* Skip t6, t7 and t8, because they can not be set by untrusted code. */
+  regs.s0 = 0x11100222;
+  regs.s1 = 0x22200333;
+  regs.s2 = 0x33300444;
+  regs.s3 = 0x44400555;
+  regs.s4 = 0x55500666;
+  regs.s5 = 0x66600777;
+  regs.s6 = 0x77700888;
+  regs.s7 = 0x88800999;
+  regs.t9 = 0xAAA00BBB;
+  /* Skip k0 and k1 registers, since they can be changed by kernel. */

[Mark Seaborn, 2013/12/26 17:01:13]

"can only"?

[petarj, 2013/12/26 18:36:24]

See the comment elsewhere.

+  regs.global_ptr = 0xDDD00EEE;
+  regs.stack_ptr = 0x2EE00FFF;
+  regs.frame_ptr = 0xFFF00000;
+  regs.return_addr = 0x0A0A0A0A;
 #else
 # error Update set_registers_and_stop for other architectures
 #endif
   JUMP_WITH_REGS(&regs, fault_addr);
 }
 
 void test_jump_to_address_zero(void) {
   /*
    * "volatile" tells Clang/LLVM not to optimize this call away and
    * replace it with an illegal instruction, which produces different
@@ skipping 36 matching lines @@
       ".byte 0x81, 0xeb, 0x14, 0x9f, 0x04, 0x08\n"  /* sub  $0x8049f14,%ebx */
       ".byte 0x5b\n");                              /* pop  %ebx */
 #elif defined(__x86_64__)
   __asm__(
       ".byte 0xf4\n"                                /* hlt */
       ".byte 0x53\n"                                /* push %rbx */
       ".byte 0x48, 0x39, 0xd8\n"                    /* cmp  %rbx,%rax */
       ".byte 0x48, 0x83, 0xeb, 0x01\n"              /* sub  $0x1,%rbx */
       ".byte 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00\n"  /* nopw 0x0(%rax,%rax,1) */
       ".byte 0x5b\n");                              /* pop  %rbx */
 #elif defined(__arm__)

[Mark Seaborn, 2013/12/26 17:01:13]

"|| defined(__mips__)" for brevity?

[petarj, 2013/12/26 18:36:24]

Done.

   printf("Single-stepping is not supported on ARM\n");
   exit(1);
+#elif defined(__mips__)
+  printf("Single-stepping is not supported on MIPS\n");
+  exit(1);
 #else
 # error Update test_single_step for other architectures
 #endif
 }
 
 void test_interrupt(void) {
   /*
    * 'volatile' is needed for clang optimizer to get this right.
    * TODO(robertm): http://code.google.com/p/nativeclient/issues/detail?id=2912
    */
@@ skipping 10 matching lines @@
 #elif defined(__arm__)
   /*
    * Arrange the breakpoint so that the test can skip over it by
    * jumping to the next bundle.  This means we never have to set the
    * program counter to within a bundle, which could be unsafe,
    * because BKPTs guard data literals in the ARM sandbox.
    */
   __asm__(".p2align 4\n"
           ".word " NACL_TO_STRING(NACL_INSTR_ARM_BREAKPOINT) "\n"
           ".p2align 4\n");
+#elif defined(__mips__)
+  __asm__(".p2align 4\n"
+          ".word 0x0000000d\n"

[Mark Seaborn, 2013/12/26 17:01:13]

ditto

[petarj, 2013/12/26 18:36:24]

Done.

+          ".p2align 4\n");
 #else
 # error Unsupported architecture
 #endif
 }
 
 void *child_thread_func(void *thread_arg) {
   for (;;) {
     g_child_thread_var++;
     breakpoint();
   }
@@ skipping 42 matching lines @@
   if (strcmp(argv[1], "test_interrupt") == 0) {
     test_interrupt();
     return 0;
   }
   if (strcmp(argv[1], "test_suspending_threads") == 0) {
     test_suspending_threads();
     return 0;
   }
   return 1;
 }