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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 774 __ Addu(a1, a1, Operand(a2)); | 774 __ Addu(a1, a1, Operand(a2)); |
| 775 // a1 is length of string in characters. | 775 // a1 is length of string in characters. |
| 776 | 776 |
| 777 ASSERT_EQ(0, num_saved_registers_ % 2); | 777 ASSERT_EQ(0, num_saved_registers_ % 2); |
| 778 // Always an even number of capture registers. This allows us to | 778 // Always an even number of capture registers. This allows us to |
| 779 // unroll the loop once to add an operation between a load of a register | 779 // unroll the loop once to add an operation between a load of a register |
| 780 // and the following use of that register. | 780 // and the following use of that register. |
| 781 for (int i = 0; i < num_saved_registers_; i += 2) { | 781 for (int i = 0; i < num_saved_registers_; i += 2) { |
| 782 __ lw(a2, register_location(i)); | 782 __ lw(a2, register_location(i)); |
| 783 __ lw(a3, register_location(i + 1)); | 783 __ lw(a3, register_location(i + 1)); |
| 784 if (global()) { | 784 if (i == 0 && global_with_zero_length_check()) { |
| 785 // Keep capture start in a4 for the zero-length check later. | 785 // Keep capture start in a4 for the zero-length check later. |
| 786 __ mov(t7, a2); | 786 __ mov(t7, a2); |
| 787 } | 787 } |
| 788 if (mode_ == UC16) { | 788 if (mode_ == UC16) { |
| 789 __ sra(a2, a2, 1); | 789 __ sra(a2, a2, 1); |
| 790 __ Addu(a2, a2, a1); | 790 __ Addu(a2, a2, a1); |
| 791 __ sra(a3, a3, 1); | 791 __ sra(a3, a3, 1); |
| 792 __ Addu(a3, a3, a1); | 792 __ Addu(a3, a3, a1); |
| 793 } else { | 793 } else { |
| 794 __ Addu(a2, a1, Operand(a2)); | 794 __ Addu(a2, a1, Operand(a2)); |
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| 816 __ mov(v0, a0); | 816 __ mov(v0, a0); |
| 817 __ Branch(&return_v0, lt, a1, Operand(num_saved_registers_)); | 817 __ Branch(&return_v0, lt, a1, Operand(num_saved_registers_)); |
| 818 | 818 |
| 819 __ sw(a1, MemOperand(frame_pointer(), kNumOutputRegisters)); | 819 __ sw(a1, MemOperand(frame_pointer(), kNumOutputRegisters)); |
| 820 // Advance the location for output. | 820 // Advance the location for output. |
| 821 __ Addu(a2, a2, num_saved_registers_ * kPointerSize); | 821 __ Addu(a2, a2, num_saved_registers_ * kPointerSize); |
| 822 __ sw(a2, MemOperand(frame_pointer(), kRegisterOutput)); | 822 __ sw(a2, MemOperand(frame_pointer(), kRegisterOutput)); |
| 823 | 823 |
| 824 // Prepare a0 to initialize registers with its value in the next run. | 824 // Prepare a0 to initialize registers with its value in the next run. |
| 825 __ lw(a0, MemOperand(frame_pointer(), kInputStartMinusOne)); | 825 __ lw(a0, MemOperand(frame_pointer(), kInputStartMinusOne)); |
| 826 // Special case for zero-length matches. | 826 |
| 827 // t7: capture start index | 827 if (global_with_zero_length_check()) { |
| 828 // Not a zero-length match, restart. | 828 // Special case for zero-length matches. |
| 829 __ Branch( | 829 // t7: capture start index |
| 830 &load_char_start_regexp, ne, current_input_offset(), Operand(t7)); | 830 // Not a zero-length match, restart. |
| 831 // Offset from the end is zero if we already reached the end. | 831 __ Branch( |
| 832 __ Branch(&exit_label_, eq, current_input_offset(), Operand(zero_reg)); | 832 &load_char_start_regexp, ne, current_input_offset(), Operand(t7)); |
| 833 // Advance current position after a zero-length match. | 833 // Offset from the end is zero if we already reached the end. |
| 834 __ Addu(current_input_offset(), | 834 __ Branch(&exit_label_, eq, current_input_offset(), Operand(zero_reg))
; |
| 835 current_input_offset(), | 835 // Advance current position after a zero-length match. |
| 836 Operand((mode_ == UC16) ? 2 : 1)); | 836 __ Addu(current_input_offset(), |
| 837 current_input_offset(), |
| 838 Operand((mode_ == UC16) ? 2 : 1)); |
| 839 } |
| 840 |
| 837 __ Branch(&load_char_start_regexp); | 841 __ Branch(&load_char_start_regexp); |
| 838 } else { | 842 } else { |
| 839 __ li(v0, Operand(SUCCESS)); | 843 __ li(v0, Operand(SUCCESS)); |
| 840 } | 844 } |
| 841 } | 845 } |
| 842 // Exit and return v0. | 846 // Exit and return v0. |
| 843 __ bind(&exit_label_); | 847 __ bind(&exit_label_); |
| 844 if (global()) { | 848 if (global()) { |
| 845 __ lw(v0, MemOperand(frame_pointer(), kSuccessfulCaptures)); | 849 __ lw(v0, MemOperand(frame_pointer(), kSuccessfulCaptures)); |
| 846 } | 850 } |
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| 1366 } | 1370 } |
| 1367 | 1371 |
| 1368 | 1372 |
| 1369 #undef __ | 1373 #undef __ |
| 1370 | 1374 |
| 1371 #endif // V8_INTERPRETED_REGEXP | 1375 #endif // V8_INTERPRETED_REGEXP |
| 1372 | 1376 |
| 1373 }} // namespace v8::internal | 1377 }} // namespace v8::internal |
| 1374 | 1378 |
| 1375 #endif // V8_TARGET_ARCH_MIPS | 1379 #endif // V8_TARGET_ARCH_MIPS |
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