ARM: Add literal pool blocking to position critical code.

test/cctest/test-disasm-arm.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 74 matching lines @@
 // value. If the comparison fails an error message is printed, but the test
 // continues to run until the end.
 #define COMPARE(asm_, compare_string) \
   { \
     int pc_offset = assm.pc_offset(); \
     byte *progcounter = &buffer[pc_offset]; \
     assm.asm_; \
     if (!DisassembleAndCompare(progcounter, compare_string)) failure = true; \
   }
 
+// Force emission of any pending literals into a pool.
+#define EMIT_PENDING_LITERALS() \
+  assm.CheckConstPool(true, false)
+
 
 // Verify that all invocations of the COMPARE macro passed successfully.
 // Exit with a failure if at least one of the tests failed.
 #define VERIFY_RUN() \
 if (failure) { \
     V8_Fatal(__FILE__, __LINE__, "ARM Disassembler tests failed.\n"); \
   }
 
 
 TEST(Type0) {
@@ skipping 168 matching lines @@
   if (CpuFeatures::IsSupported(ARMv7)) {
     COMPARE(mov(r5, Operand(0x01234), LeaveCC, ne),
             "13015234       movwne r5, #4660");
     // We only disassemble one instruction so the eor instruction is not here.
     COMPARE(eor(r5, r4, Operand(0x1234), LeaveCC, ne),
             "1301c234       movwne ip, #4660");
     // Movw can't do setcc so we don't get that here.  Mov immediate with setcc
     // is pretty strange anyway.
     COMPARE(mov(r5, Operand(0x01234), SetCC, ne),
             "159fc000       ldrne ip, [pc, #+0]");
+    // Emit a literal pool now, otherwise this could be dumped later, in the
+    // middle of a different test.
+    EMIT_PENDING_LITERALS();
+
     // We only disassemble one instruction so the eor instruction is not here.
     // The eor does the setcc so we get a movw here.
     COMPARE(eor(r5, r4, Operand(0x1234), SetCC, ne),
             "1301c234       movwne ip, #4660");
 
     COMPARE(movt(r5, 0x4321, ne),
             "13445321       movtne r5, #17185");
     COMPARE(movw(r5, 0xabcd, eq),
             "030a5bcd       movweq r5, #43981");
   }
@@ skipping 446 matching lines @@
             "e04987ff       strd r8, [r9], #-127");
     COMPARE(strd(r10, fp, MemOperand(fp, 127, PreIndex)),
             "e1eba7ff       strd r10, [fp, #+127]!");
     COMPARE(strd(ip, sp, MemOperand(sp, -127, PreIndex)),
             "e16dc7ff       strd ip, [sp, #-127]!");
   }
 
   VERIFY_RUN();
 }