- Remove a few jumps from store barrier code.

- Remove a few jumps from store barrier code.
Committed: https://code.google.com/p/dart/source/detail?r=8959

[siva, 2012-06-21 00:52:47]

lgtm

[kasperl, 2012-06-21 05:05:47]

https://chromiumcodereview.appspot.com/10607002/diff/3001/runtime/vm/assemble...
File runtime/vm/assembler_ia32.cc (right):

https://chromiumcodereview.appspot.com/10607002/diff/3001/runtime/vm/assemble...
runtime/vm/assembler_ia32.cc:1390: andl(value, Immediate(0x5));
I think you should add a comment here explaning that this is teh awesome.

[sra1, 2012-06-22 05:17:44]

https://chromiumcodereview.appspot.com/10607002/diff/3001/runtime/vm/assemble...
File runtime/vm/assembler_ia32.cc (right):

https://chromiumcodereview.appspot.com/10607002/diff/3001/runtime/vm/assemble...
runtime/vm/assembler_ia32.cc:1395: j(NOT_ZERO, no_update);
and value,7
lea value,[object*8 + value]
and value,0b111111
cmp value,0b001101
jnz no_update

might not be faster if there is extra cycles on the alu -> address generator ->
alu path.

Is reducing the number of branches enough of a win to cover the extra push/pop
execution time and the ~5 bytes extra code (counting the push/pop)?
Branch predictors often ignore the low k bits, in effect predicting adjacent
and/or nearby branches together.

[Ivan Posva, 2012-06-22 06:56:22]

https://chromiumcodereview.appspot.com/10607002/diff/3001/runtime/vm/assemble...
File runtime/vm/assembler_ia32.cc (right):

https://chromiumcodereview.appspot.com/10607002/diff/3001/runtime/vm/assemble...
runtime/vm/assembler_ia32.cc:1390: andl(value, Immediate(0x5));
On 2012/06/21 05:05:47, kasperl wrote:
> I think you should add a comment here explaning that this is teh awesome. 
Thanks! Half of the credit goes to Slava...

I will also add a comment here explaining how it works and what properties need
to be preserved. This is tricky code because throwing in Smis does end up with
all kinds of weird unexpected bit patterns.

https://chromiumcodereview.appspot.com/10607002/diff/3001/runtime/vm/assemble...
runtime/vm/assembler_ia32.cc:1395: j(NOT_ZERO, no_update);
On 2012/06/22 05:17:44, sra1 wrote:
> and value,7
> lea value,[object*8 + value]
> and value,0b111111
> cmp value,0b001101
> jnz no_update
> 
> might not be faster if there is extra cycles on the alu -> address generator
->
> alu path.
> 
> Is reducing the number of branches enough of a win to cover the extra push/pop
> execution time and the ~5 bytes extra code (counting the push/pop)?
> Branch predictors often ignore the low k bits, in effect predicting adjacent
> and/or nearby branches together.

Thanks for the suggestion to use lea to separate the bits, it is similar to a
suggestion we received from Lasse. I will measure the impact once we have
convinced ourselves that this approach is valid.